CY8C26443 Datasheet, PDF (138/150 Pages) Cypress Semiconductor – Configurable Mixed-Signal Array with On-board Controller

Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
13.3 AC Characteristics
Table 116: AC Operating Specifications
Symbol
AC Operating Specifications
Minimum
F_{CPU1 CPU Frequency (5 V Nominal)}^1,2,3
91.35
F_{CPU2 CPU Frequency (3.3V Nominal)}^4,3
91.35
F_48M
Digital PSoC Block Frequency
F_24M
Digital PSoC Block Frequency
F_GPIO GPIO Operating Frequency
F_IMO
Internal Main Oscillator Frequency
(0^oC to +85^oC)
23.4
F_IMOC
Internal Main Oscillator Frequency Cold
(-40^oC to 0^oC)
22.44
F_32K1
Internal Low Speed Oscillator Frequency
(Non Sleep)
15⁶
F_32K2
Internal Low Speed Oscillator Frequency
(Sleep or Halt)
15⁷
F_{32K3 External Crystal Oscillator}
-
F_pll
PLL Frequency
-
T_f
Output Fall Time
2¹⁰
T_r
Output Rise Time
3¹⁰
T_pllslew PLL Lock Time
0.5
SV_dd
V_dd Rise Rate at Power Up
80¹¹
T_os
External Crystal Oscillator Startup to 1%
-
T_osacc External Crystal Oscillator Startup to 100 ppm -
T_xrst
External Reset Pulse Width
10
Typical
2,400
1,200
48
24
12
24
24
32
32
32.768⁸
23.986⁹
-
-
-
-
100
150
-
Maximum
2,460
1,230
49.2^1,5
24.6^2,4
24.6
24.6
50
64
-
-
12
18
10
-
500¹²
600¹³
-
Unit
kHz
kHz
MHz
MHz
MHz
MHz
MHz
kHz
kHz
kHz
MHz
ns
ns
ms
mV/ms
ms
ms
µs
1. 4.75V < V_cc < 5.25V.
2. Accuracy derived from Internal Main Oscillator with appropriate trim for V_cc range.
3. 0^oC to +85^oC.
4. 3.0V < V_cc < 3.6V.
5. See Application Note AN2012 ”Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for infor-
mation on maximum frequency for User Modules.
6. Limits are valid only when not in sleep mode.
7. Limits are valid only when in sleep mode.
8. Accuracy is capacitor and crystal dependent.
9. Is a multiple (x732) of crystal frequency.
10. Load capacitance = 50 pF.
11. To minimum allowable voltage for desired frequency.
12. The crystal oscillator frequency is guaranteed to be within 1% of its final value by the end of the 1s startup timer
period. Timer period may be as short as 640 ms for the case where F_32K1 is 50 kHz. Correct operation assumes a
properly loaded 1uW maximum drive level 32.768 kHz crystal.
13. The crystal oscillator frequency is within 100 ppm of its final value by the end of the T_osacc period. Correct opera-
tion assumes a properly loaded 1 uW maximum drive level 32.768 kHz crystal. 3.0V <= V_cc <= 5.5V, -40 ^oC <= T_A
<= 85 ^oC.
138
Document #: 38-12010 CY Rev. *B CMS Rev. 3.22
August 18, 2003