STAR1000_09 Datasheet, PDF (13/21 Pages) Cypress Semiconductor – 1M Pixel Radiation Hard CMOS Image Sensor

STAR1000
Table 8. Pin List of the STAR1000 Sensor (continued)
Pin
Pin Name
Pin Type
Pin Description
9
LD_X
Input
Digital input. Latch address (A0…A9) to X-register (0 = track, 1 = hold).
10
VDDA
Supply
Analog power supply of the imager (typical 5V).
11
GNDD
Ground
Digital ground of the imager.
12
GNDA
Ground
Analog ground of the imager.
13
CLK_X
Input
Digital input. Clock X-register (output valid & stable when CLK_X is high).
14
RESET_DS
Input
Digital input (active high). Resets row indicated by Y-address (see sensor
timing diagram).
RESET_DS is used for dual-slope integration (see FAQ).
GND is used for normal operation.
15
VDDD
Supply
Digital supply of the image sensor.
16
RESET
Input
Digital input (active high). Resets row indicated by Y-address (see sensor
timing diagram).
17
S
Input
Digital input (active high). Control signal for column amplifier (see sensor
timing diagram).
18
R
Input
Digital input (active high). Control signal for column amplifier (see sensor
timing diagram).
19
NBIAS_DEC
Input
Analog input. Biasing of address decoder.
Connect with 100 kΩ to VDDA and decouple with 100nF to GND.
20
A_IN2
Input
Additional analog inputs. For proper conversion with on-chip ADC, the
input signal must lie within the output signal range of the image sensor
21
A_IN3
Input
(approximately +2V to +4V).
22
A_IN1
Input
23
A_SEL1
Input
Selection of analog channel: '00' selects image sensor ('01' selects A_IN1,
'10' A_IN2, and '11' A_IN3).
24
A_SEL0
Input
25
NBIAS_OAMP
Input
Analog input. Bias of output amplifier (speed/power control).
Connect with 100 kΩ to VDDA and decouple with 100 nF to GND for 12.5
MHz output rate (lower resistor values yield higher maximal pixel rates at
the cost of extra power dissipation).
26
PBIAS
Input
Analog input. Biasing of the multiplexer circuitry.
Connect with 20 kΩ to GND and decouple with 100 nF to VDD.
27
G1
Input
Digital input. Select output amplifier gain value: G0 = LSB, G1 = MSB ('00'
= unity gain, '01' = x2, '10' = x4, '11' = x8).
28
G0
Input
29
CAL
Input
Digital input (active high). Initialization of output amplifier. Output amplifier
outputs BLACKREF in unity gain mode when CAL is high (1).
Apply pulse pattern (see sensor timing diagram).
30
OUT
Output
Analog Output Video Signal. Connected to the analog input of the internal
(pin 52) 10-bit ADC or an external ADC.
31
BLACKREF
Input
Analog input. Control voltage for output signal offset level. Buffered
on-chip, the reference level can be generated by a 100 kΩ resistive divider.
Connect to 2V DC for use with on-chip ADC.
32
VDDA
Supply
Analog power supply of image core (typical 5V).
33
VDDD
Supply
Digital power supply of image core (typical 5V).
Document Number: 38-05714 Rev. *C
Page 13 of 21
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