W234_02 Datasheet, PDF (12/14 Pages) Cypress Semiconductor – Dual Direct Rambus™ Clock Generator

Layout Example
W234
+3.3V Supply
FB
VDDIR
G
G
G
G
G
G
G
VDDIPD
0.005 µF 10 µF
C4
C3
GG
1
2
3
4
5
6^G
7
8^G
9
10
11
12
13
14
28
27
26
G₂₅ ^G
24
23
22
G
21
G
20
19
G ₁₈ ^G
17
16
15
Internal Power Supply Plane
FB = Dale ILB1206 - 300 (300Ω @ 100 MHz)
G = VIA to GND plane layer
All Bypass cap = 0.1 Ceramic XR7
Document #: 38-07232 Rev. *B
Page 12 of 14
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.