W147G Datasheet, PDF (11/12 Pages) Cypress Semiconductor – Frequency Generator for Integrated Core Logic

PRELIMINARY
Group Skew and Jitter Limits
Output Group
CPU
SDRAM
APIC
48MHz
3V66
PCI
REF
Pin-Pin Skew Max
175 ps
250 ps
250 ps
250 ps
175 ps
500 ps
N/A
Cycle-Cycle Jitter
250 ps
250 ps
500 ps
500 ps
500 ps
500 ps
1000 ps
Duty Cycle
45/55
45/55
45/55
45/55
45/55
45/55
45/55
Nom Vdd
2.5V
3.3V
2.5V
3.3V
3.3V
3.3V
3.3V
Output
Buffer
Test Point
Clock Output Wave
2.0
1.25
2.5V Clocking
Interface
0.4
T_RISE
T_HIGH
T_FALL
Test Load
T_PERIOD
Duty Cycle
T_LOW
T_HIGH
T_PERIOD
Duty Cycle
2.4
3.3V Clocking ^1.5
Interface ^0.4
T_RISE
T_FALL
T_LOW
Figure 8. Output Buffer
W147G
Skew, Jitter
Measure Point
1.25V
1.5V
1.25V
1.5V
1.5V
1.5V
1.5V
Ordering Information
Ordering Code
Package
Name
W147G
H
Package Type
56-pin SSOP (300 mils)
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Document #: 38-00820
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