CY7C67300 Datasheet, PDF (109/119 Pages) Cypress Semiconductor – EZ-Host Programmable Embedded USB Host/Peripheral Controller

14.4 SRAM Write Cycle
Address
CS
t_AW
t_CSW
WE
Dout
t_WC
t_WPW
t_DW
t_DH
Data Valid
CY7C67300
Parameter
t_AW
t_CSW
t_DW
t_WPW[15]
t_DH
t_WC
Description
Write address valid to WE LOW
CS LOW to WE LOW
Data valid to WE HIGH
WE pulse width
Data hold from WE HIGH
WE HIGH to CS HIGH
Min.
Typical
Max.
Unit
7
ns
7
ns
15
ns
15
ns
4.5
ns
13
ns
Note:
15. t_WPW The write pulse width = 18.8 ns min. for zero and one wait states. The write pulse = 18.8 ns + (n – 1)*T for wait states = n, n > 1, T = 48-MHz clock period.
Document #: 38-08015 Rev. *E
Page 109 of 119