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CY8C20XX6A_13 Datasheet, PDF (1/51 Pages) Cypress Semiconductor – 1.8 V Programmable CapSense® Controller with SmartSense™ Auto-tuning 1–33 Buttons, 0–6 Sliders | |||
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CY8C20XX6A/S
1.8 V Programmable CapSense® Controller
with SmartSense⢠Auto-tuning
1â33 Buttons, 0â6 Sliders
1.8 V Programmable CapSense® Controller with SmartSense⢠Auto-tuning 1â33 Buttons, 0â6 Sliders
Features
â Low power CapSense® block with SmartSense Auto-tuning
â Patented CSA_EMC, CSD sensing algorithms
â SmartSense_EMC Auto-Tuning
⢠Sets and maintains optimal sensor performance during run
time
⢠Eliminates system tuning during development and
production
⢠Compensates for variations in manufacturing process Low
average power consumption â xx µA/sensor in run time
(wake-up and scan once every yyy ms)
â Powerful Harvard-architecture processor
â M8C CPU with a max speed of 24 MHz
â Operating Range: 1.71 V to 5.5 V
â Standby Mode 1.1 μA (Typ)
â Deep Sleep 0.1 μA (Typ)
â Operating Temperature range: â40 °C to +85 °C
â Flexible on-chip memory
â 8 KB flash, 1 KB SRAM
â 16 KB flash, 2 KB SRAM
â 32 KB flash, 2 KB SRAM
â Read while Write with EEPROM emulation
â 50,000 flash erase/write cycles
â In-system programming simplifies manufacturing process
â Four Clock Sources
â Internal main oscillator (IMO): 6/12/24 MHz
â Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
â External 32 KHz Crystal Oscillator
â External Clock Input
â Programmable pin configurations
â Up to 36 general-purpose I/Os (GPIOs) configurable as
buttons or sliders
â Dual mode GPIO (Analog inputs and Digital I/O supported)
â High sink current of 25 mA per GPIO
⢠Max sink current 120 mA for all GPIOs
â Source Current
⢠5 mA on ports 0 and 1
⢠1 mA on ports 2,3 and 4
â Configurable internal pull-up, high-Z and open drain modes
â Selectable, regulated digital I/O on port 1
â Configurable input threshold on port 1
â Versatile Analog functions
â Internal analog bus supports connection of multiple sensors
to form ganged proximity sensor
â Internal Low-Dropout voltage regulator for high power supply
rejection ratio (PSRR)
â Full-Speed USB
â 12 Mbps USB 2.0 compliant
â Additional system resources
â I2C Slave:
⢠Selectable to 50 kHz, 100 kHz, or 400 kHz
â Configurable up to 12 MHz SPI master and slave
â Three 16-bit timers
â Watchdog and sleep timers
â Integrated supervisory circuit
â 10-bit incremental analog-to-digital converter (ADC) with
internal voltage reference
â Two general-purpose high speed, low power analog
comparators
â Complete development tools
â Free development tool (PSoC Designerâ¢)
â Sensor and Package options
â 10 Sensors â QFN 16, 24
â 16 Sensors â QFN 24
â 22 / 25 Sensors â QFN 32
â 24 Sensors - WLCSP 30
â 31 Sensors â SSOP 48
â 33 Sensors â QFN 48
Errata: For information on silicon errata, see âErrataâ on page 45. Details include trigger conditions, devices affected, and proposed workaround
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 001-54459 Rev. *T
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised June 28, 2013
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