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STC3800 Datasheet, PDF (14/48 Pages) Connor-Winfield Corporation – INTEGRATED - STRATUM 3E TIMING SOURCE
Detailed Description continued
Reference Input Quality Monitoring
Each reference input is monitored for signal presence and frequency offset. Signal presence for the Ref1-8 inputs is
indicated in the Ref_Activity register and signal presence and frequency for the Xref input is indicated in bits 0-3 of the
Xref_Activity register. The frequency offset between the Ref1-8 inputs and the calibrated local oscillator is available in
the Ref_Frq_Offset registers (8). Register Ref_Pullin_Sts indicates, for each of the Ref1-8 inputs, if the reference is
within the maximum pull-in range. The maximum pull-in range is indicated in register Max_Pullin_Range, and may be
set in .1ppm increments. Typically, it would be set according to the values specified by the standards (GR-1244)
appropriate for the particular stratum of operation.
The Ref_Qualified register contains the “anded” condition of the Ref_Activity and Ref_Pullin_Sts registers for each
of the Ref1-8 inputs, qualified for 10 seconds. When a reference signal has been present for > 10 seconds and is within
the pull-in range, it’s bit is set.
The Ref_Available register contains the “anded” condition of the Ref_Qualified register and the Ref_Mask register,
and therefore represents the availability of a reference for selection when automatic reference and operational mode
selection is enabled.
When active reference selection is manual (see Reference Input Selection below), if the selected reference signal is
lost, Loss of Signal (LOS) is asserted, active “high” (pin output and bit 0 of the DPLL_Status register).
Reference Input Selection, Frequencies, and Mode Selection
One of eight reference input signals (Ref1-8) may be selected for synchronization in Master mode (as described below
and in the Op_Mode register description). Ref1-8 may each be 8 kHz, 1.544 MHz, 2.048 MHz, 12.96 MHz, 19.44 MHz,
25.92 MHz, 38.88 MHz, 51.84 MHz or 77.76 MHz
Reference frequencies are auto-detected (frequency determined by the chip) and the detected frequency may be read
from the Ref_Frq_Priority registers (See Register Descriptions and Operation section).
The Xref input for slave operation is frequency auto-detected and may be 8 kHz, 1.544 MHz, 2.048 MHz, 12.96 MHz,
19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz or 77.76 MHz Signal presence and frequency for the Xref input is
indicated in bits 0-3 of the Xref_Activity register.
In Register Mode for reference and operational mode selection (HM_Ref = 0), active reference and operational mode
selection may be manual or automatic, as determined by bit 1 in the Ctl_Mode register. In manual mode, register writes
to Op_Mode select the reference and mode. The reset default is manual mode.
In automatic mode, the reference is selected according to the priorities written to the eight Ref_Frq_Priority registers.
Individual references may be masked for use/no-use according to the Ref_Mask register. A reference may only be
selected if it is “available” - that is, it is qualified, as indicated in the Ref_Qualified register, and is not masked (See
Reference Input Quality Monitoring and Register Descriptions and Operation sections).
Furthermore, bit 3 of each Ref_Frq_Priority register will determine if that reference is revertive or non-revertive. When
a reference fails, the next highest priority “available” (signal present, non-masked, and acceptable frequency offset)
reference will be selected. When a reference returns, it will be switched to only if it is of higher priority and the current
active reference is marked “Revertive”. Additionally, the reversion is delayed according to the value written to the
Ref_Rev_Delay register (From 0 to 255 minutes).
The Freerun_Priority register allows Free Run to be treated like a reference. When it is enabled, Free Run will be
entered when all references of higher priority are lost or masked. If/when a higher priority reference returns, it is
switched to if Free Run is set as “revertive”. When disabled, Free Run will be entered only if manually selected, or all
references fail and no Hold Over history is available.
Preliminary Data Sheet #: TM061 Page 14 of 48 Rev: P06 Date: 11/22/04
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice