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FX828 Datasheet, PDF (12/34 Pages) CML Microcircuits – CTCSS/DCS/SELCALL Processor
CTCSS/DCS/SELCALL Processor
FX828
GENERAL CONTROL Register (Hex address $88)
This register is used to control the functions of the device as described below:
BPF ENABLE
(Bit 7)
When this bit is "1" the audio band-pass filter is enabled. When this bit is "0" the
audio band-pass filter is disabled (powersaved).
BPF UN-MUTE
(Bit 6)
When this bit is "1" the audio band-pass filter output is switched to the RX
AUDIO OUT pin. When this bit is "0" the output of the filter is disconnected from
RX AUDIO OUT, which is then in a high impedance state.
This control, along with BPF ENABLE, allows the filter to power up and settle
internally before switching the output on, to avoid clicks when coming out of
powersave.
BPF 6dB PAD
(Bit 5)
When this bit is "1" a 6dB attenuator is inserted into the output of the audio
band-pass filter. When this bit is "0" the output of the audio band-pass filter is
not attenuated.
DAC
(Bits 4, 3 and 2)
These three bits set the level of the digital to analogue converter that feeds the
negative input of the comparator. The DAC can be set to one of eight levels
equally spaced between VSS and VBIAS, not including VSS, but including VBIAS,
i.e. with a 5V supply, the lowest level would be 312.5mV set by "000" in bits 2, 3
and 4 and the highest level would be 2.5V set by "111" in bits 2, 3 and 4.
TIMER ENABLE
(Bit 1)
When this bit goes to a "1" the general purpose timer is restarted and its internal
register is re-loaded from the value specified in the GENERAL PURPOSE
TIMER Register (Hex address $8B). It will then count down from the count held
in its internal register. When this bit is "0" the count down is disabled and the
last pre-programmed value is retained in the timer's internal register.
TIMER RE-CYCLE
(Bit 0)
When this bit is "1" the general purpose timer will re-load its internal register
from the value specified in the GENERAL PURPOSE TIMER Register (Hex
Address $8B) when the count in the internal register reaches zero (i.e. the
timeout has expired). It then restarts the count down, so that the timer
continuously cycles.
When this bit is "0" the general purpose timer will stop when the count in the
internal register reaches zero (i.e. the timeout has expired). The timer can only
be restarted by reloading a value into the GENERAL PURPOSE TIMER
Register (Hex address $8B).
If this bit is switched from "1" to "0" whilst the timer is enabled then the timer will
complete the present count before stopping.
GENERAL PURPOSE TIMER (GPT) Register (Hex address $8B)
This register is used to preset the value of a countdown timer. Once a binary value has been loaded into
this register, it will be automatically transferred to an internal register within the timer. This internal
register is then decremented at each count interval (1ms) until it reaches zero. On reaching zero, the
GPT IRQ FLAG in the IRQ FLAG Register (Hex address $8F) is set to "1". An interrupt is generated on
the IRQN pin if the GPT IRQ MASK in the IRQ MASK Register (Hex address $8E) is "1" otherwise the
GPT IRQ FLAG remains set to "1" and no interrupt is generated.
© 2009 CML Microsystems Plc
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