CPC7508 Datasheet, PDF (12/14 Pages) Clare, Inc. – Line Card Access Switch

CPC7508
Neither the T_SD input control nor the T_SD output
functions are affected by the latch function. Since
internal thermal shutdown control and external “All-off”
control is not affected by the state of the LATCH
enable input, T_SD will override state control.
2.5 Power Supplies
Only a +12 V supply and ground are connected to the
CPC7508. Switch state control is powered exclusively
by the +12 V supply while internal level shifters
provide the necessary translation from the low voltage
inputs to the switch driver circuitry.
2.6 Protection
The CPC7508 uses a combination of current limiting
and a thermal shutdown mechanism to protect the
SLIC device and itself from damage during transient
line faults such as lightning.
For power induction or power-cross fault conditions
the DC current limit function restricts the maximum
current through the switches. Excess power
dissipation during current limiting events will trigger
the thermal shutdown circuit to shut down all of the
switches.
2.6.1 Current Limiting function
If a lightning strike transient occurs when any of the
devices switches are operating, the current will be
restricted by the dynamic current limit response of the
active switches. For instance, during the talk state,
when a 1000V 10x1000 μs lightning pulse
(GR-1089-CORE) is applied to the line though a
properly clamped external protector, the current seen
at T_LINE and R_LINE will be a pulse with a typical
magnitude of 2.5 A and a duration less than 0.5 μs.
If a power-cross fault occurs with the device in the talk
state, the current is passed though the break switches
SW1 and SW2 but is limited by the DC current limit
response of the two break switches. The DC current
limit specified over temperature is between 80 mA and
425 mA and the circuitry has a negative temperature
coefficient. As a result, if the device is subjected to
extended heating due to a power cross fault condition,
the measured current at T_LINE and R_LINE will decrease
as the device temperature increases. If the device
temperature rises sufficiently, the temperature
shutdown mechanism will activate and the device will
enter the all-off state.
2.6.2 Thermal Shutdown
The thermal shutdown mechanism activates when the
device die temperature reaches a minimum of 110° C,
placing the device in the all-off state regardless of
logic input. During thermal shutdown events the T_SD
pin will output a logic low with a nominal 0 V level. A
logic high is output from the T_SD pin during normal
operation with a typical output level equal to V_DD.
If presented with a short duration transient such as a
lightning event, the thermal shutdown feature will
typically not activate. But in an extended power-cross
event, the device temperature will rise and the thermal
shutdown mechanism will activate forcing the switches
to the all-off state. At this point the current measured
into T_LINE or R_LINE will drop to zero. Once the device
enters thermal shutdown it will remain in the all-off
state until the temperature of the device drops below
the de-activation level of the thermal shutdown circuit.
This permits the device to autonomously return to
normal operation. If the transient has not passed,
current will again flow up to the value allowed by the
dynamic DC current limiting of the switches and
heating will resume, reactivating the thermal shutdown
mechanism. This cycle of entering and exiting the
thermal shutdown mode will continue as long as the
fault condition persists. If the magnitude of the fault
condition is great enough, the external secondary
protector will activate shunting the fault current to
ground.
2.7 External Protection Elements
The CPC7508 requires only the over voltage
secondary protector normally used to protect the
ringing SLIC placed on the line side of the LCAS. The
secondary protector must limit voltage transients to
levels that do not exceed the breakdown voltage or
input-output isolation barrier of the CPC7508. Use of a
foldback or crowbar type protector is recommended to
minimize stresses on the LCAS.
Consult Clare’s application note, AN-100, “Designing
Surge and Power Fault Protection Circuits for Solid
State Subscriber Line Interfaces” for equations related
to the specifications of external secondary protectors,
fused resistors and PTCs.
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