CS2200-CP Datasheet, PDF (7/26 Pages) Cirrus Logic – Fractional-N Frequency Synthesizer

CS2200-CP
AC ELECTRICAL CHARACTERISTICS
Test Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; T_A = -10°C to +70°C (Commercial Grade);
C_L = 15 pF.
Parameters
Symbol
Conditions
Min Typ Max Units
Crystal Frequency
Reference Clock Input Frequency
Reference Clock Input Duty Cycle
Internal System Clock Frequency
PLL Clock Output Frequency
PLL Clock Output Duty Cycle
Clock Output Rise Time
Clock Output Fall Time
Period Jitter
Base Band Jitter (100 Hz to 40 kHz)
f_XTAL
Fundamental Mode
8
f_{REF_CLK}
8
D_{REF_CLK}
45
f_{SYS_CLK}
8
f_{CLK_OUT}
6
t_OD
Measured at VD/2
48
t_OR
20% to 80% of VD
-
t_OF
80% to 20% of VD
-
t_JIT
(Note 3)
-
(Notes 3, 4)
-
Wide Band JItter (100 Hz Corner)
(Notes 3, 5)
-
PLL Lock Time - REF_CLK
t_LR
f_{REF_CLK} = 8 to 75 MHz
-
Output Frequency Synthesis Resolution (Note 6)
f_err
0
-
50 MHz
-
75 MHz
-
55
%
18.75 MHz
-
75 MHz
50
52
%
1.7
3.0
ns
1.7
3.0
ns
70
150 ps rms
50
- ps rms
175
- ps rms
1
2
ms
-
±0.5 ppm
Notes: 3. f_{CLK_OUT} = 24.576 MHz; Sample size = 10,000 points; AuxOutSrc[1:0] = 11.
4. In accordance with AES-12id-2006 section 3.4.2. Measurements are Time Interval Error taken with 3rd
order 100 Hz to 40 kHz bandpass filter.
5. In accordance with AES-12id-2006 section 3.4.1. Measurements are Time Interval Error taken with 3rd
order 100 Hz Highpass filter.
6. The frequency accuracy of the PLL clock output is directly proportional to the frequency accuracy of the
reference clock.
DS759PP1
7