CS2200-CP Datasheet, PDF (1/26 Pages) Cirrus Logic – Fractional-N Frequency Synthesizer

CS2200-CP
Fractional-N Frequency Synthesizer
Features
 Delta-Sigma Fractional-N Frequency Synthesis
– Generates a Low Jitter 6 - 75 MHz Clock
from an 8 - 75 MHz Reference Clock
 Highly Accurate PLL Multiplication Factor
– Maximum Error Less Than 1 PPM
 I²C^® / SPI™ Control Port
 Configurable Auxiliary Output
– Buffered Reference Clock
– PLL Lock Indication
– Duplicate PLL Output
 Flexible Sourcing of Reference Clock
– External Oscillator or Clock Source
– Supports Inexpensive Local Crystal
 Minimal Board Space Required
– No External Analog Loop-filter
Components
General Description
The CS2200-CP is an extremely versatile system clock-
ing device that utilizes a programmable phase lock loop.
The CS2200-CP is based on an analog PLL architec-
ture comprised of a Delta-Sigma Fractional-N
Frequency Synthesizer. This architecture allows for fre-
quency synthesis and clock generation from a stable
reference clock.
The CS2200-CP supports both I²C and SPI for full soft-
ware control.
The CS2200-CP is available in a 10-pin MSOP package
in Commercial (-10 °C to +70 °C) grade.
Customer development kits are also available for device
evaluation. Please see “Ordering Information” on
page 25 for complete details.
I²C/SPI Software
Control
I²C / SPI
3.3 V
Timing Reference
PLL Output
PLL Lock Indicator
Auxiliary
Output
8 MHz to 75 MHz
Low-Jitter Timing
Reference
Phase
Comparator
Internal
Loop Filter
Voltage Controlled
Oscillator
Fractional-N
Divider
N
Delta-Sigma
Modulator
Output to Input
Clock Ratio
6 to 75 MHz
PLL Output
Preliminary Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
JUN '08
DS759PP1