CS2300-OTP Datasheet, PDF (4/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier with Internal LCO

1. PIN DESCRIPTION
CS2300-OTP
VD
1
GND
2
CLK_OUT
3
AUX_OUT
4
CLK_IN
5
10
M0
9
M1
8
M2
7
FILTN
6
FILTP
Pin Name
VD
GND
CLK_OUT
AUX_OUT
CLK_IN
FILTP
FILTN
M2
M1
M0
# Pin Description
1 Digital Power (Input) - Positive power supply for the digital and analog sections.
2 Ground (Input) - Ground reference.
3 PLL Clock Output (Output) - PLL clock output.
4
Auxiliary Output (Output) - This pin outputs a buffered version of one of the input or output clocks,
or a status signal, depending on configuration.
5 Frequency Reference Clock Input (Input) - Clock input for the Digital PLL frequency reference.
6 LCO Filter Connections (Input/Output) - These pins provide external supply filtering for the LCO.
7
8 Mode Select (Input) - M2 is a configurable mode selection pin.
9 Mode Select (Input) - M1 is a configurable mode selection pin.
10 Mode Select (Input) - M0 is a configurable mode selection pin.
4
DS844PP1