CS2300-OTP Datasheet, PDF (3/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier with Internal LCO

CS2300-OTP
THERMAL CHARACTERISTICS ......................................................................................................... 26
10. ORDERING INFORMATION .............................................................................................................. 27
11. REVISION HISTORY .......................................................................................................................... 27
LIST OF FIGURES
Figure 1. Typical Connection Diagram ........................................................................................................ 5
Figure 2. Delta-Sigma Fractional-N Frequency Synthesizer ....................................................................... 8
Figure 3. Hybrid Analog-Digital PLL ............................................................................................................ 9
Figure 4. External Component Requirements for LCO ............................................................................. 10
Figure 5. CLK_IN removed for > 223 LCO cycles ..................................................................................... 11
Figure 6. CLK_IN removed for < 223 LCO cycles but > tCS ..................................................................... 11
Figure 7. CLK_IN removed for < tCS ........................................................................................................ 12
Figure 8. Low bandwidth and new clock domain ...................................................................................... 12
Figure 9. High bandwidth with CLK_IN domain re-use ............................................................................. 13
Figure 10. Ratio Feature Summary ........................................................................................................... 16
Figure 11. PLL Clock Output Options ....................................................................................................... 16
Figure 12. Auxiliary Output Selection ........................................................................................................ 17
Figure 13. M2 Mapping Options ................................................................................................................ 18
Figure 14. Parameter Configuration Sets .................................................................................................. 20
LIST OF TABLES
Table 1. Modal and Global Configuration .................................................................................................. 10
Table 2. Ratio Modifier .............................................................................................................................. 14
Table 3. Automatic Ratio Modifier ............................................................................................................. 14
Table 4. Example Audio Oversampling Clock Generation from CLK_IN .................................................. 15
Table 5. Example 12.20 R-Values ............................................................................................................ 24
Table 6. Example 20.12 R-Values ............................................................................................................ 24
DS844PP1
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