CS2300-OTP Datasheet, PDF (23/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier with Internal LCO

6.3.6
Clock Input Bandwidth (ClkIn_BW[2:0])
Sets the minimum loop bandwidth when locked to CLK_IN.
ClkIn_BW[2:0]
000
001
010
011
100
101
110
111
Application:
Minimum Loop Bandwidth
1 Hz
2 Hz
4 Hz
8 Hz
16 Hz
32 Hz
64 Hz
128 Hz
“Adjusting the Minimum Loop Bandwidth for CLK_IN” on page 12
CS2300-OTP
DS844PP1
23