CDB5378 Datasheet, PDF (32/72 Pages) Cirrus Logic – Single-channel Seismic Evaluation System

CDB5378
Even though the Cirrus Logic components on CDB5378 will tolerate up to 5 V from the VD power supply,
other components are specified for +3.3 V operation only and so it is recommended to use only the reg-
ulated +3.3 V jumper setting for VD.
The VD and VCORE power supplies on CDB5378 include reverse-biased Schottkey diodes to ground to
protect against reverse voltages that could latch-up the CMOS components. Also included on VD and
VCORE are 100 uF bulk capacitors for bypassing and to help settle transients plus individual 0.1 uF by-
pass capacitors local to the digital power supply pins of each device.
2.5 PCB Layout
2.5.1 Layer Stack
CDB5378 layer 1 is dedicated as an analog routing layer. All critical analog signal routes are on this layer.
Some CPLD and microcontroller digital routes are also included on this layer away from the analog signal
routes.
CDB5378 layer 2 is a solid ground plane without splits or routing. A solid ground plane provides the best
return path for bypassed noise to leave the system. No separate analog ground is required since analog
signals on CDB5378 are differentially routed.
CDB5378 layer 3 is dedicated for power supply routing. Each power supply net includes at least 100 µF
bulk capacitance as a charge well for settling transient current loads.
CDB5378 layer 4 is dedicated as a digital routing layer.
2.5.2 Differential Pairs
Analog signal routes on CDB5378 are differential with dedicated + and - traces. All source and return an-
alog signal currents are constrained to the differential pair route and do not return through the ground
plane. Differential traces are routed together with a minimal gap between them so that noise events affect
them equally and are rejected as common mode noise.
IN+ IN-
Figure 4. Differential Pair Routing
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DS639DB3