WM8281 Datasheet, PDF (286/392 Pages) Cirrus Logic – Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation

WM8281
The control registers applicable to Free-running FLL mode are described in Table 108.
REGISTER BIT
ADDRESS
LABEL
DEFAULT
DESCRIPTION
R369
1 FLL1_FREERUN
1
FLL1 Free-Running Mode Enable
(0171h)
0 = Disabled
FLL1
1 = Enabled
Control 1
The FLL feedback mechanism is halted in
Free-Running mode, and the latest
integrator setting is maintained
R375
15 FLL1_FRC_INTE
(0177h)
G_UPD
FLL1 Loop
Filter Test _{11:0 FLL1_FRC_INTE}
1
G_VAL [11:0]
0
281h
Write ‘1’ to apply the
FLL1_FRC_INTEG_VAL setting.
(Only valid when FLL1_FREERUN=1)
FLL1 Forced Integrator Value
R376
15 FLL1_INTEG_VA
0
FLL1 Integrator Valid
(0178h)
LID
Indicates if the FLL1_INTEG register is
FLL1 NCO
valid
Test 0
0 = Not valid
1 = Valid
11:0 FLL1_INTEG
[11:0]
000h
FLL1 Integrator Value (Read-only)
Indicates the current FLL1 integrator
setting. Only valid when
FLL1_INTEG_VALID = 1.
R401
1 FLL2_FREERUN
1
FLL2 Free-Running Mode Enable
(0191h)
0 = Disabled
FLL2
1 = Enabled
Control 1
The FLL feedback mechanism is halted in
Free-Running mode, and the latest
integrator setting is maintained
R407
15 FLL2_FRC_INTE
(0197h)
G_UPD
FLL2 Loop
Filter Test _{11:0 FLL2_FRC_INTE}
1
G_VAL [11:0]
0
000h
Write ‘1’ to apply the
FLL2_FRC_INTEG_VAL setting.
(Only valid when FLL2_FREERUN=1)
FLL2 Forced Integrator Value
R408
15 FLL2_INTEG_VA
0
FLL2 Integrator Valid
(0198h)
LID
Indicates if the FLL2_INTEG register is
FLL2 NCO
valid
Test 0
0 = Not valid
1 = Valid
11:0 FLL2_INTEG
[11:0]
000h
FLL2 Integrator Value
(Read-only)
Indicates the current FLL2 integrator
setting. Only valid when
FLL2_INTEG_VALID = 1.
Table 108 Free-Running FLL Mode Control
286
Rev 4.0