CS4215 Datasheet, PDF (26/52 Pages) Cirrus Logic – 16-Bit Multimedia Audio Codec

CS4215
Figure 16). DD loopback checks the interface
between the host and the CS4215 by taking the
data on SDIN and looping it back onto SDOUT,
with the data on SDOUT being one frame de-
layed from the data on SDIN. The host can
verify that the data received is exactly the same
as the data sent, thereby indicating the interface
between the two devices and the digital interface
on the CS4215 are operating properly. The out-
put DAC’s are functional in DD loopback. Now
that the interface has been verified, the rest of
the CS4215 can be tested using the second tier
of loopback.
The second tier of loopback is a digital-analog-
digital loopback, DAD, which is selected by
setting the DAD bit in control register 4. DAD
loopback checks the analog section of the
CS4215 by connecting the right and left analog
outputs, after the output attenuator, to the analog
inputs of the gain stage. This allows testing of
most of the CS4215 from the host by sending a
known digital signal to the DACs and monitoring
the digital signal from the ADCs. During DAD
loopback, the monitor attenuator must be set at
maximum (full mute), and the analog outputs
may be individually muted. The analog inputs
are disconnected internally. The flow of test data
for both DD and DAD loopback modes is illus-
trated in the top portion of Figure 16.
Analog-to-Analog Loopback Mode
A third loopback mode is achieved by setting the
monitor attenuator to zero attenuation and send-
ing the DACs digital zero via SDIN. This
loopback is termed analog-digital-analog, ADA,
since the selected analog input will now appear
on the enabled analog outputs. Since this test is
controlled by external stimulus and the host is
not involved (except to send the DACs zeros), it
is generally considered a laboratory test as op-
posed to a self test. The bottom portion of
Figure 16 illustrates the ADA signal flow
through the CS4215. Note that this test requires
the host send analog zeros to the DAC. Each
data format has a different code for zero. See
Figures 13 and 14.
+5V
Supply
Ferrite Bead
2.0
+ 1 uF 0.1 uF
+
1 uF
38
VD1 VD2
0.1 uF
0.1 uF
+ ^{1 uF}
23 24
VA1 VA2
CS4215
Figure 17. Optional Power Supply Arrangement
26
DS76F2