CS4215 Datasheet, PDF (22/52 Pages) Cirrus Logic – 16-Bit Multimedia Audio Codec

CS4215
(12) bits for the DACs and compressed from the
+FS
upper 13 (12) bits to 8 bits for the ADCs.
Data Time Slot 1&2, Left Channel Audio Data
0
-FS
A-Law: 2Ah
15h
55h/D5h
95h
AAh
u-Law: 00h
3Fh
7Fh/FFh
BFh
80h
DIGITAL CODE
Figure 14. Companded Data Formats
of 128 (80 Hex) is considered analog zero for
the 8-bit unsigned format.
Time slot 1 and 2 contain audio data for the left
channel. In mono modes, only the left channel
data is used, however both the right and left
output DACs are driven. In 8-bit modes, only
time slot 1 is used for the data.
Data Time Slot 3&4, Right Channel Audio Data
Time slot 3 and 4 contains audio data for the
right channel. In mono modes, the right ADC
outputs zero and the right DAC uses the left
digital data. In 8-bit modes, only time slot 3 is
used for the data.
A non-linear coding scheme is used for the com-
panded formats as shown in Figure 14. This
scheme is compatible with CCITT G.711. Com-
panding uses more precision at lower amplitudes
at the expense of less precision at higher ampli-
tudes. µ-Law is equivalent to 13 bits at low
signal levels and A-Law is equivalent to 12 bits.
This low-level dynamic range is obtained at the
expense of large-signal dynamic range which, for
both µ-Law and A-Law, is equivalent to 6 bits.
The CS4215 internally operates at 16 bits. The
companded data is expanded to the upper 13
Figure 15 summarizes all the time slot bit alloca-
tions for the 4 data modes and for control mode.
Reset
RESET going low causes all the internal control
registers to be set to the states shown with each
register description. RESET must be brought low
and high at least once after power up. RESET
returning high causes the CS4215 to execute an
offset calibration cycle. RESET or D/C returning
high should occur at least 50 ms after the power
supply has stabilized to allow the voltage refer-
ence to settle.
Data Time Slot 5, Output Setting
D7
Register HE
Reset (R) 0
D6 D5 D4 D3 D2 D1 D0
LE LO5 LO4 LO3 LO2 LO1 LO0
0
1
1
1
1
1
1
BIT
LO5-0
LE
HE
NAME
Left Channel Output
Attenuation Setting
Line Output Enable
Headphone Output
Enable
VALUE
FUNCTION
1 1 1 1 1 1 63 R 1.5dB attenuation steps. LO5 is the MSB.
0 = no attenuation. 111111 = -94.5dB
0
R Analog line outputs off (muted).
1
Analog line outputs on.
0
R Headphone output off (muted).
1
Headphone output on.
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DS76F2