CS42406 Datasheet, PDF (21/50 Pages) Cirrus Logic – 24-BIT, 192kHz 2-IN 6-OUT AUDIO CODEC

CS42406
SWITCHING CHARACTERISTICS - DAC SERIAL AUDIO PORT (Logic “0” = GND =
0 V, Logic “1” = VLS)
Parameter
MCLK Specifications
MCLK Frequency
MCLK Duty Cycle
Single-Speed*
DAC_LRCK Duty Cycle
DAC_SCLK Frequency
DAC_SCLK Pulse Width Low
DAC_SCLK Pulse Width High
DAC_SCLK rising to DAC_LRCK edge delay
DAC_SCLK rising to DAC_LRCK edge setup time
SDINx valid to DAC_SCLK rising setup time
DAC_SCLK rising to SDINx hold time
Double-Speed*
DAC_LRCK Duty Cycle
DAC_SCLK Frequency
DAC_SCLK Pulse Width Low
DAC_SCLK Pulse Width High
DAC_SCLK rising to DAC_LRCK edge delay
DAC_SCLK rising to DAC_LRCK edge setup time
SDINx valid to DAC_SCLK rising setup time
DAC_SCLK rising to SDINx hold time
Quad-Speed*
DAC_LRCK Duty Cycle
DAC_SCLK Frequency
DAC_SCLK Pulse Width Low
DAC_SCLK Pulse Width High
DAC_SCLK rising to DAC_LRCK edge delay
DAC_SCLK rising to DAC_LRCK edge setup time
SDINx valid to DAC_SCLK rising setup time
DAC_SCLK rising to SDINx hold time
Symbol Min
1.024
22
45
45
-
t_sclkl
20
t_sclkh
20
t_slrd
20
t_slrs
20
t_sdlrs
20
t_sdh
20
45
-
t_sclkl
20
t_sclkh
20
t_slrd
20
t_slrs
20
t_sdlrs
20
t_sdh
20
45
-
t_sclkl
20
t_sclkh
20
t_slrd
20
t_slrs
20
t_sdlrs
20
t_sdh
20
Typ
Max
Unit
-
12.8
MHz
-
25.6
MHz
-
55
%
-
55
%
-
128×Fs
Hz
-
-
ns
-
-
ns
ns
ns
ns
ns
-
55
%
-
64×Fs
Hz
-
-
ns
-
-
ns
ns
ns
ns
ns
-
55
%
-
MCLK/2
Hz
-
-
ns
-
-
ns
ns
ns
ns
ns
* For a description of Speed Modes, please refer to Section 4.1.2 on page 30.
21