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WM8310 Datasheet, PDF (174/291 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem
WM8310
Pre-Production
REGISTER
ADDRESS
R16393
(4009h)
Software
Scratch
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
15:0 SW_SCRATCH 0000_0000Software Scratch Register for use by the host processor.
[15:0]
_0000_000 Note that this register’s contents are retained in the
0
BACKUP power state.
Register 4009h Software Scratch
REGISTER BIT
ADDRESS
R16394
15
(400Ah)
OTP Control
13
11
10
9
8
7:6
5
LABEL
DEFAULT
DESCRIPTION
REFER TO
OTP_PROG
OTP_MEM
OTP_FINAL
OTP_VERIFY
OTP_WRITE
OTP_READ
OTP_READ_L
VL [1:0]
OTP_BULK
0
Selects the PROGRAM device state.
0 = No action
1 = Select PROGRAM mode
Note that, after PROGRAM mode has been selected,
the chip will remain in PROGRAM mode until a Device
Reset.
Protected by security key.
1
Selects ICE or OTP memory for Program commands.
0 = ICE
1 = OTP
Protected by security key.
0
Selects the FINALISE command, preventing further
OTP programming.
0 = No action
1 = Finalise Command
Protected by security key.
0
Selects the VERIFY command for the selected OTP
memory page(s).
0 = No action
1 = Verify Command
Protected by security key.
0
Selects WRITE command for the selected OTP memory
page(s).
0 = No action
1 = Write Command
Protected by security key.
0
Selects READ command for the selected memory
page(s).
0 = No action
1 = Read Command
Protected by security key.
00
Selects the Margin Level for READ or VERIFY OTP
commands.
00 = Normal
01 = Reserved
10 = Margin 1
11 = Margin 2
Protected by security key.
0
Selects the number of memory pages for ICE / OTP
commands.
0 = Single Page
1 = All Pages
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PP, May 2012, Rev 3.1
174