WM8944B Datasheet, PDF (134/165 Pages) Cirrus Logic – Mono Low-Power CODEC with Video Buffer

WM8944B
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R88 (58h) 15:0 SE1_NOTCH_M 0000_0000 Filter coefficients for Signal Enhancement 1 (SE1) notch
SE1_NOTCH
40 [15:0]
_0000_000 filter
_M40
0
Register 58h SE1_NOTCH_M40
REFER TO
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R89 (59h) 15:0 SE1_NOTCH_M 0001_0000 Filter coefficients for Signal Enhancement 1 (SE1) notch
SE1_NOTCH
41 [15:0]
_0000_000 filter
_M41
0
Register 59h SE1_NOTCH_M41
REFER TO
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R90 (5Ah) 15:0 SE1_NOTCH_M 0000_0000 Filter coefficients for Signal Enhancement 1 (SE1) notch
SE1_NOTCH
50 [15:0]
_0000_000 filter
_M50
0
Register 5Ah SE1_NOTCH_M50
REFER TO
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R91 (5Bh) 15:0 SE1_NOTCH_M 0001_0000 Filter coefficients for Signal Enhancement 1 (SE1) notch
SE1_NOTCH
51 [15:0]
_0000_000 filter
_M51
0
Register 5Bh SE1_NOTCH_M51
REFER TO
REGISTER BIT
ADDRESS
R92 (5Ch)
1
SE1_DF1_
CONFIG
0
LABEL
SE1_DF1_R
_ENA
SE1_DF1_L
_ENA
Register 5Ch SE1_DF1_CONFIG
DEFAULT
DESCRIPTION
0
SE1 Right channel DF1 filter enable
0 = Disabled
1 = Enabled
0
SE1 Left channel DF1 filter enable
0 = Disabled
1 = Enabled
REFER TO
REGISTER BIT
ADDRESS
R93 (5Dh) 15:0
SE1_DF1_
L0
LABEL
SE1_DF1_L0
[15:0]
Register 5Dh SE1_DF1_L0
DEFAULT
DESCRIPTION
0001_0000 Filter coefficients for Signal Enhancement 1 (SE1) channel
_0000_000 DF1 filter
0
REFER TO
REGISTER BIT
ADDRESS
R94 (5Eh) 15:0
SE1_DF1_
134
LABEL
DEFAULT
DESCRIPTION
REFER TO
SE1_DF1_L1 0000_0000 Filter coefficients for Signal Enhancement 1 (SE1) channel
[15:0]
_0000_000 DF1 filter
Rev 4.3