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CS4235 Datasheet, PDF (13/94 Pages) Cirrus Logic – CrystalClear Low Cost ISA Audio System
CS4235
CrystalClear TM Low Cost ISA Audio System
PnP ISA Bus
Interface
Logical Device 0 Logical Device 1 Logical Device 2 Logical Device 3 Logical Device 4
WSS Codec:
I/O: WSSbase
2 DMA Chan.
1 Interrupt
Synthesis:
I/O: SYNbase
[1 Interrupt]
SBPro:
I/O: SBbase
(DMA shared)
(Interrupt shared)
Game Port:
I/O: GAMEbase
Control:
I/O: CTRLbase
[1 Interrupt]
MPU-401:
I/O: MPUbase
1 Interrupt
Figure 1. Logical Devices
CDROM:
I/O:
CDbase
ACDbase
[1 Interrupt]
[1 DMA Chan.]
Port, MPU-401, and CDROM devices support
10-bit address decoding, while the Windows
Sound System and Control devices support 12-
bit address decoding. Devices that support 10-bit
address decoding, require A10 and A11 be zero
for proper decode; therefore, no aliasing occurs
through the 12-bit address space.
I/O CYCLES
Every device that is enabled, requires I/O space.
An I/O cycle begins when the part decodes a
valid address on the bus while the DMA ac-
knowledge signals are inactive and AEN is low.
The IOR and IOW signals determine the direc-
tion of the data transfer. For read cycles, the part
will drive data on the SD<7:0> lines while the
host asserts the IOR strobe. Write cycles require
the host to assert data on the SD<7:0> lines and
strobe the IOW signal. Data is latched on the ris-
ing edge of the IOW strobe.
I/O ADDRESS DECODING
The logical devices use 10-bit or 12-bit address
decoding. The Synthesizer, Sound Blaster, Game
To prevent aliasing into the upper address space,
a "16-bit decode" option may be used, where the
upper address bits SA12 through SA15 are con-
nected to the part. SA12-SA15 are then decoded
to be 0,0,0,0 for all logical device address de-
coding. When the upper address bits are used,
the CDROM interface is no longer available
since the upper address pins are multiplexed
with the CDROM pins (See Reset and Power
Down section). If the CDROM is needed, the
circuit shown in Figure 2 can replace the SA12
through SA15 pins and provide the same func-
tionality. Four cascaded OR gates, using a
74ALS32, can replace the ALS138 in Figure 2,
but causes a greater delay in address decoding.
DS252PP2
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