CAT28F102 Datasheet, PDF(9/14 Page) Catalyst Semiconductor

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CAT28F102 Datasheet, PDF (9/14 Pages) Catalyst Semiconductor – 1 Megabit CMOS Flash Memory

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CAT28F102

WRITE OPERATIONS

The following operations are initiated by observing the

sequence specified in the Write Command Table.

Read Mode

The device can be put into a standard READ mode by

initiating a write cycle with XX00H on the data bus. The

subsequent read cycles will be performed similar to a

standard EPROM or E2PROM Read.

Signature Mode

An alternative method for reading device signature (see

Read Operations Signature Mode), is initiated by writing

the code XX90H into the command register while keep-

ing VPP high. A read cycle from address 0000H with CE

and OE low (and WE high) will output the device signa-

ture.

CATALYST Code = 0000 0000 0011 0001 (0031H)

A Read cycle from address 0001H retrieves the binary

code for the device on outputs I/O0 to I/O7.

28F102 Code = 0000 0000 0101 0001 (0051H)

Erase Mode

During the first Write cycle, the command XX20H is

written into the command register. In order to commence

the erase operation, the identical command of XX20H

has to be written again into the register. This two-step

process ensures against accidental erasure of the

memory contents. The final erase cycle will be stopped

at the rising edge of WE, at which time the Erase Verify

command (XXA0H) is sent to the command register.

During this cycle, the address to be verified is sent to the

address bus and latched when WE goes low. An inte-

grated stop timer allows for automatic timing control over

this operation, eliminating the need for a maximum

erase timing specification. Refer to AC Characteristics

(Program/Erase) for specific timing parameters.

Figure 6. A.C. Timing for Erase Operation

VCC POWER-UP SETUP ERASE

& STANDBY

COMMAND

ERASE

COMMAND

ERASING ERASE VERIFY

COMMAND

ERASE

VCC POWER-DOWN/

VERIFICATION

STANDBY

ADDRESSES

tWC

tAS

tAH

CE (E)

tCS

tCH

tCS

tCH

OE (G)

tGHWL

tWPH

tWHWH2

tWHGL

WE (W)

DATA (I/O)

HIGH-Z

tWP

tDS

DATA IN

= XX20H

tDH

tDS

tWP

tDH

DATA IN

= XX20H

VCC 5.0V

VPP VPPH

VPPL

tVPEL

tWP

tDS

tDH

DATA IN

= XXA0H

tOE

tOLZ

tLZ

tCE

tRC

tEHQZ

tDF

tOH

VALID

DATA OUT

28F102 Fig. 6

28F102 F06

Doc. No. 25038-0A 2/98 F-1

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