CAT34C02 Datasheet, PDF (7/17 Pages) Catalyst Semiconductor – 2-Kb I2C EEPROM for DDR2 DIMM Serial Presence Detect

Figure 5. Byte Write Timing
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SLAVE
ADDRESS
BYTE
ADDRESS
S
T
DATA
O
P
SDA LINE S
P
A
A
A
C
C
C
K
K
K
CAT34C02
Figure 6. Write Cycle Timing
SCL
SDA
8th Bit
Byte n
ACK
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
Figure 7. Page Write Timing
S
T
BUS ACTIVITY: ^A
SLAVE
MASTER ^R ADDRESS
T
SDA LINE S
BYTE
ADDRESS (n)
A
A
C
C
K
K
DATA n
DATA n+1
A
A
C
C
K
K
NOTE: IN THIS EXAMPLE n = XXXX 0000(B); X = 1 or 0
S
T
DATA n+P ^O
P
P
A
C
K
Figure 8. Memory Array
FFH
7FH
00H
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Hardware Write Protectable
(by connecting WP pin to
Vcc)
Software Write Protectable
(by setting the write
protect flags)
7
Doc No. 1095, Rev. C