CAT34C02 Datasheet, PDF (11/17 Pages) Catalyst Semiconductor – 2-Kb I2C EEPROM for DDR2 DIMM Serial Presence Detect

CAT34C02
Table 1. SWP Commands
Control Pin Levels ⁽¹⁾ Flag State ⁽²⁾
Action
Slave Address
ACK Address ACK Data ACK Write
WP A₂ A₁ A₀ PSWP RSWP b₇ to b₄ b₃ b₂ b₁ b₀ ^?
Byte ? Byte ? Cycle
X
A₂
A₁
A₀
1
X
A₂ A₁ A₀ X No
Set GND ^A2 ^A1 ^A0
0
X
PSWP _{VCC A2}
A₁
A₀
0
X
A₂ A₁ A₀ 0 Yes
A₂ A₁ A₀ 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X
A₂
A₁
A₀
0
X
A₂ A₁ A₀ 1 Yes
X GND GND V_HV
1
X
0 0 1 X No
X GND GND V_HV
0
Set
RSWP ^{GND GND GND VHV}
0
V_CC GND GND V_HV
0
1
0 0 1 X No
0
0110 0 0 1 0 Yes
0
0 0 1 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X GND GND V_HV
0
0
0 0 1 1 Yes
X GND V_CC V_HV
1
X
0 1 1 X No
Clear GND GND ^VCC ^VHV
0
X
RSWP _{VCC GND VCC VHV}
0
X
0 1 1 0 Yes
0 1 1 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X GND V_CC V_HV
0
X
0 1 1 1 Yes
Note:
(1) Here A₂, A₁ and A₀ are either at V_CC or GND.
(2) 1 stands for ‘Set’, 0 stands for ‘Not Set’, X stands for ‘don’t care’.
Figure 12. Software Write Protect (Write)
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SDA LINE S
SLAVE
ADDRESS
BYTE
ADDRESS
S
T
DATA
O
P
XXXXXXXX XXXXXXXX P
A
A
C
C
K
K
X = Don't Care
AN
C or O
K
A
C
K
Figure 13. Software Write Protect (Read)
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SDA LINE S
S
SLAVE
T
ADDRESS ^O
P
P
AN
C or O
K
A
C
K
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
11
Doc No. 1095, Rev. C