CAT25C01_05 Datasheet, PDF (4/15 Pages) Catalyst Semiconductor – 1K/2K/4K SPI Serial CMOS EEPROM

CAT25C01, CAT25C02, CAT25C04
FUNCTIONAL DESCRIPTION
PIN DESCRIPTION
The CAT25C01/02/04 supports the SPI bus data SI: Serial Input
transmission protocol. The synchronous Serial Peripheral SI is the serial data input pin. This pin is used to input all
Interface (SPI) helps the CAT25C01/02/04 to interface opcodes, byte addresses, and data to be written to the
directly with many of today’s popular microcontrollers. CAT25010/20/40. Input data is latched on the rising
The CAT25C01/02/04 contains an 8-bit instruction edge of the serial clock for SPI modes (0, 0 & 1, 1).
register. (The instruction set and the operation codes
are detailed in the instruction set table)
SO: Serial Output
SO is the serial data output pin. This pin is used to
After the device is selected with CS going low, the first
byte will be received. The part is accessed via the SI pin,
with data being clocked in on the rising edge of SCK.
The first byte contains one of the six op-codes that define
ts ^{the operation to be performed.}
transfer data out of the CAT25C01/02/04. During a read
cycle, data is shifted out on the falling edge of the serial
clock for SPI modes (0,0 & 1,1).
r _{Figure 1. Sychronous Data Timing}
a ^VIH
CS
d ^{P SCK}
V_IL
t_CSS
V_IH
V_IL
V_IH
e SI
VIL
t_WH
t_SU
t_H
VALID IN
tinu ^VOH
HI-Z
SO
V_OL
Note: Dashed Line= mode (1, 1) – – – – –
INSTRUCTION SET
n _Instruction
o _WREN
WRDI
c _RDSR
is ^WRSR
READ
D^WRITE
Opcode
0000 0110
0000 0100
0000 0101
0000 0001
0000 X011⁽¹⁾
0000 X010⁽¹⁾
t_CS
t_CSH
t_WL
t_RI
tFI
t_V
t_HO
t_DIS
HI-Z
Operation
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
Note:
(1) X=0 for CAT25C01, CAT25C02. X=A8 for CAT25C04.
Doc. No. 1105, Rev. B
4
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice