CAT25C128_05 Datasheet, PDF (1/12 Pages) Catalyst Semiconductor – 128K/256K-Bit SPI Serial CMOS EEPROM

CAT25C128/256
CAT25C128/256
128K/256K-Bit SPI Serial CMOS EEPROM
FEATURES
I 5 MHz SPI Compatible
I 1.8 to 5.5 Volt Operation
I Hardware and Software Protection
I Low Power CMOS Technology
I SPI Modes (0,0 &1,1)
I Industrial and Automotive
Temperature Ranges
I Self-Timed Write Cycle
I 64-Byte Page Write Buffer
I Block Write Protection
– Protect 1/4, 1/2 or all of EEPROM Array
I 100,000 Program/Erase Cycles
I 100 Year Data Retention
I RoHS-compliant packages
DESCRIPTION
The CAT25C128/256 is a 128K/256K-Bit SPI Serial
CMOS EEPROM internally organized as 16Kx8/32Kx8
bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
CAT25C128/256 features a 64-byte page write buffer.
The device operates via the SPI bus serial interface
and is enabled through a Chip Select (CS). In addition
to the Chip Select, the clock input (SCK), data in (SI)
and data out (SO) are required to access the device.
PIN CONFIGURATION
SOIC Package
(V**, X)
CS ¹
SO ²
WP ³
VSS 4
8 VCC
7 _HOLD
6 SCK
5 SI
DIP Package (L)
TSSOP Package (Y14)**
CS ¹
SO ²
NC ³
14 _{V CC}
13 _HOLD
12 _NC
NC ⁴
11 _NC
NC ⁵
10 _NC
WP 6
9 SCK
VSS 7
8 SI
TSSOP Package (Y20)**
CS ¹
SO 2
WP 3
8
7
VCC
NC ¹
CS ²
HOLD
SO
3
6 SCK
SO ⁴
SS ⁴
5 SI
NC ⁵
NC ⁶
**CAT25C128 only.
WP 7
VSS 8
NC 9
NC 10
PIN FUNCTIONS
Pin Name
Function
SO
Serial data Output
SCK
WP
Serial Clock
Write Protect
V
Power Supply
CC
V_SS
Ground
CS
Chip Select
SI
HOLD
Serial Data Input
Suspends Serial Input
NC
No Connect
20 _NC
19 _{V CC}
18 _HOLD
17 _HOLD
16 _NC
15 _NC
14 SCK
13 SI
12 NC
11 NC
The HOLD pin may be used to suspend any serial
communication without resetting the serial sequence.
The CAT25C128/256 is designed with software and
hardware write protection features including Block Lock
protection. The device is available in 8-pin DIP, 8-pin
SOIC, 14-pin TSSOP and 20-pin TSSOP packages.
BLOCK DIAGRAM
SO
SI
CS
WP
HOLD
SCK
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
STATUS
REGISTER
XDEC
EEPROM
ARRAY
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
For Ordering Information details, see page 11.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Document No. 1018, Rev. I