CAT24WC33_05 Datasheet, PDF (1/12 Pages) Catalyst Semiconductor – 32K/64K-Bit I2C Serial CMOS EEPROM

CAT24WC33/65
32K/64K-Bit I²C Serial CMOS EEPROM
FEATURES
I 400 KHz I²C Bus Compatible*
I Commercial, Industrial and Automotive Tem-
I 1.8 to 5.5 Volt Read and Write Operation
perature Ranges
I Cascadable for up to Eight Devices
I 32/64-Byte Page Write Buffer
ts ^{I Self-Timed Write Cycle with Auto-Clear}
I 8-Pin DIP or 8-Pin SOIC
I Schmitt Trigger Inputs for Noise Protection
I Write Protection
–Bottom 1/4 Array Protected When WP at V_IH
I 1,000,000 Program/Erase Cycles
I 100 Year Data Retention
ar DESCRIPTION
The CAT24WC33/65 is a 32K/64K-bit Serial CMOS
P _E²_{PROM internally organized as 4096/8192 words of 8}
bits each. Catalyst’s advanced CMOS technology sub-
stantially reduces device power requirements. The
CAT24WC33/65 features a 32-byte page write buffer.
The device operates via the I²C bus serial interface and
is available in 8-pin DIP or 8-pin SOIC packages.
d _{PIN CONFIGURATION}
e _{DIP Package (P, L)}
u ^{A0 1}
A1 2
A2 3
tin ^{VSS 4}
8 VCC
7 WP
6 SCL
5 SDA
SOIC Package (J, W, K, X)
n _{A0 1}
o ^{A1 2}
A2 3
c^{VSS 4}
8 VCC
7 WP
6 SCL
5 SDA
is ^{PIN FUNCTIONS}
Pin Name
Function
D^{A0, A1, A2 Device Address Inputs}
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
VSS
DOUT
ACK
WORD ADDRESS
BUFFERS
SDA
START/STOP
LOGIC
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
256
E²PROM
XDEC 128/256 _{128/256 X 256}
CONTROL
WP
LOGIC
DATA IN STORAGE
SDA
SCL
Serial Data/Address
Serial Clock
HIGH VOLTAGE/
TIMING CONTROL
WP
Write Protect
VCC
+1.8V to +5.5V Power Supply
VSS
Ground
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I²C Bus Protocol.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1049, Rev. D