CS42526 Datasheet, PDF (63/90 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver

CS42526
TMUX2
1
1
TMUX1
1
1
TMUX0
0
1
Description
Output from pin RXP6
Output from pin RXP7
Table 18. TXP Output Selection
6.19.2 RECEIVER MULTIPLEXER (RMUXX)
Default = 000
Function:
Selects which of the eight receiver inputs will be mapped to the internal receiver.
RMUX2
0
0
0
0
1
1
1
1
RMUX1
0
0
1
1
0
0
1
1
RMUX0
0
1
0
1
0
1
0
1
Description
Input from pin RXP0
Input from pin RXP1
Input from pin RXP2
Input from pin RXP3
Input from pin RXP4
Input from pin RXP5
Input from pin RXP6
Input from pin RXP7
Table 19. Receiver Input Selection
6.20 Interrupt Status (address 20h) (Read Only)
7
UNLOCK
6
Reserved
5
QCH
4
DETC
3
DETU
2
Reserved
1
OverFlow
0
RERR
For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since the register
was last read. A ”0” means the associated interrupt condition has NOT occurred since the last reading of the register.
Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will always
be “0” in this register.
6.20.1 PLL UNLOCK (UNLOCK)
Default = 0
Function:
PLL unlock status bit. This bit will go high if the PLL becomes unlocked.
6.20.2 NEW Q-SUBCODE BLOCK (QCH)
Default = 0
Function:
Indicates when the Q-Subcode block has changed.
6.20.3 D TO E C-BUFFER TRANSFER (DETC)
Default = 0
Function:
Indicates when the channel status buffer has changed.
DS585PP5
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