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CS42526 Datasheet, PDF (58/90 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
CS42526
6.12 Channel Mute (address 0Eh)
7
Reserved
6
Reserved
5
B3_MUTE
4
A3_MUTE
3
B2_MUTE
2
A2_MUTE
1
B1_MUTE
0
A1_MUTE
6.12.1 INDEPENDENT CHANNEL MUTE (XX_MUTE)
Default = 0
0 - Disabled
1 - Enabled
Function:
The Digital-to-Analog converter outputs of the CS42526 will mute when enabled. The quiescent volt-
age on the outputs will be retained. The muting function is affected, similar to attenuation changes,
by the Soft and Zero Cross bits (SZC[1:0]).
6.13 Volume Control (addresses 0Fh, 10h, 11h, 12h, 13h, 14h)
7
xx_VOL7
6
xx_VOL6
5
xx_VOL5
4
xx_VOL4
3
xx_VOL3
2
xx_VOL2
1
xx_VOL1
0
xx_VOL0
6.13.1 VOLUME CONTROL (XX_VOL)
Default = 0
Function:
The Digital Volume Control registers allow independent control of the signal levels in 0.5 dB incre-
ments from 0 to -127 dB. Volume settings are decoded as shown in Table 15. The volume changes
are implemented as dictated by the Soft and Zero Cross bits (SZC[1:0]). All volume settings less than
-127 dB are equivalent to enabling the MUTE bit for the given channel.
Binary Code
00000000
00101000
01010000
01111000
10110100
Decimal Value
0
40
80
120
180
Volume Setting
0 dB
-20 dB
-40 dB
-60 dB
-90 dB
Table 15. Example Digital Volume Settings
6.14 Channel Invert (address 17h)
7
Reserved
6
Reserved
5
INV_B3
4
INV_A3
3
INV_B2
2
INV_A2
1
INV_B1
6.14.1 INVERT SIGNAL POLARITY (INV_XX)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
0
INV_A1
58
DS585PP5