CS4201 Datasheet, PDF (22/68 Pages) Cirrus Logic – CrystalClear Audio Codec 97 with headphone Amplifier

CS4201
4. REGISTER INTERFACE
Reg Register Name D15 D14
00h Reset
0 SE4
02h Master Volume
Mute 0
04h Headphone Volume
Mute 0
06h Mono Volume
Mute 0
0Ah PC_BEEP Volume
Mute 0
0Ch Phone Volume
Mute 0
0Eh Mic Volume
Mute 0
10h Line In Volume
Mute 0
12h CD Volume
Mute 0
14h Video Volume
Mute 0
16h Aux Volume
Mute 0
18h PCM Out Volume
Mute 0
1Ah Record Select
0
0
1Ch Record Gain
Mute 0
20h General Purpose
POP 0
22h 3D Control
0
0
26h Powerdown Ctrl/Stat EAPD PR6
28h Ext’d Audio ID
ID1 ID0
2Ah Ext’d Audio Stat/Ctrl
0
0
2Ch PCM Front DAC Rate SR15 SR14
32h PCM L/R ADC Rate
SR15 SR14
3Ch Ext’d Modem ID
ID1 ID0
3Eh Ext’d Modem Stat/Ctrl
0
0
4Ch GPIO Pin Config.
0
0
4Eh GPIO Pin Polarity/Type 1
1
50h GPIO Pin Sticky
0
0
52h GPIO Pin Wakeup Mask 0
0
54h GPIO Pin Status
0
0
Cirrus Logic Defined Registers:
5Eh AC Mode Control
0
0
60h Misc. Crystal Control
0
0
68h S/PDIF Control
SPEN Val
6Ah Serial Port Control
SDEN 0
7Ch Vendor ID1
F7 F6
7Eh Vendor ID2
T7 T6
D13
SE3
ML5
ML5
0
0
0
0
0
0
0
0
0
0
0
3D
0
PR5
0
0
SR13
SR13
0
0
0
1
0
0
0
0
0
0
0
F5
T5
D12 D11 D10 D9 D8 D7 D6
SE2 SE1 SE0 0 ID8 ID7 0
ML4 ML3 ML2 ML1 ML0 0
0
ML4 ML3 ML2 ML1 ML0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 20dB
GL4 GL3 GL2 GL1 GL0 0
0
GL4 GL3 GL2 GL1 GL0 0
0
GL4 GL3 GL2 GL1 GL0 0
0
GL4 GL3 GL2 GL1 GL0 0
0
GL4 GL3 GL2 GL1 GL0 0
0
0
0 SL2 SL1 SL0 0
0
0 GL3 GL2 GL1 GL0 0
0
0
0
0 MIX MS LPBK 0
0
0
0
0
00
0
PR4 PR3 PR2 PR1 PR0 0
0
0
0
0 AMAP 0
0
0
0
0
0
0
0
0
0
SR12 SR11 SR10 SR9 SR8 SR7 SR6
SR12 SR11 SR10 SR9 SR8 SR7 SR6
0
0
0
0
0
0
0
0
0
0
0 PRA 0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
00
0
0
0
0
0
0
0
0
0
DPC
Fs
0
F4
T4
ASPM 0
0
0
L CC6
0
0
F3 F2
T3 T2
0 DDM AMAP SPAS
Reserved 10dB CRST
CC5 CC4 CC3 CC2
0
0
0
0
F1 F0 S7 S6
T1 T0 0 DID2
D5
0
MR5
MR5
MM5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SR5
SR5
0
0
0
1
0
0
0
D4
ID4
MR4
MR4
MM4
PV3
GN4
GN4
GR4
GR4
GR4
GR4
GR4
0
0
0
0
0
0
0
SR4
SR4
0
0
0
1
0
0
0
SM1 SM0
Reserved
CC1 CC0
0
0
S5 S4
DID1 DID0
D3
0
MR3
MR3
MM3
PV2
GN3
GN3
GR3
GR3
GR3
GR3
GR3
0
GR3
0
S3
REF
0
0
SR3
SR3
0
0
0
1
0
0
0
D2
0
MR2
MR2
MM2
PV1
GN2
GN2
GR2
GR2
GR2
GR2
GR2
SR2
GR2
0
S2
ANL
0
0
SR2
SR2
0
0
0
1
0
0
0
D1
0
MR1
MR1
MM1
PV0
GN1
GN1
GR1
GR1
GR1
GR1
GR1
SR1
GR1
0
S1
DAC
0
0
SR1
SR1
0
0
GC1
GP1
GS1
GW1
GI1
0
0
0
GPOC Reserved
Emph Copy /Audio
SDO2 SDSC SDF1
S3 S2 S1
1 REV2 REV1
D0 Default
0 1990h
MR0 8000h
MR0 8000h
MM0 8000h
0 0000h
GN0 8008h
GN0 8008h
GR0 8808h
GR0 8808h
GR0 8808h
GR0 8808h
GR0 8808h
SR0 0000h
GR0 8000h
0 0000h
S0 0000h
ADC 000Fh
VRA x201h
VRA 0000h
SR0 BB80h
SR0 BB80h
0 x000h
GPIO 0100h
GC0 0003h
GP0 FFFFh
GS0 0000h
GW0 0000h
GI0 0000h
0
0
Pro
SDF0
S0
REV0
0080h
0002h
0000h
0000h
4352h
5949h
Table 1. Register Overview for the CS4201
22
DS483PP3