DAC8552 Datasheet, PDF (16/22 Pages) Burr-Brown (TI) – 16-BIT, DUAL CHANNEL, ULTRA-LOW GLITCH VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER

DAC8552
SLAS430 – JULY 2006
www.ti.com
OPERATION EXAMPLES
Example 1: Write to Data Buffer A; Through Buffer B; Load DACA Through DACB Simultaneously
• 1st — Write to DataBuffer A:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
0
0
X
0
0
0
D15
—
D1
D0
• 2nd — Write to Data Buffer B and Load DAC A and DAC B simultaneously:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
1
1
X
1
0
0
D15
—
D1
D0
The DACA and DACB analog outputs simultaneously settle to the specified values upon completion of the 2nd
write sequence. (The Load command moves the digital data from the data buffer to the DAC register at which
time the conversion takes place and the analog output is updated. Completion occurs on the 24th falling SCLK
edge after SYNC LOW.)
Example 2: Load New Data to DACA and DACB Sequentially
• 1st — Write to Data Buffer A and Load DAC A: DACA output settles to specified value upon completion:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
0
1
X
0
0
0
D15
—
D1
D0
• 2nd — Write to Data Buffer B and Load DAC B: DACB output settles to specified value upon completion:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
1
0
X
1
0
0
D15
—
D1
D0
After completion of the 1st write cycle, the DACA analog output settles to the voltage specified; upon completion
of write cycle 2, the DACB analog output settles.
Example 3: Power-Down DACA to 1kΩ and Power-Down DACB to 100kΩ Simultaneously
• 1st — Write power-down command to Data Buffer A:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
0
0
X
0
0
1
Don't Care
• 2nd — Write power-down command to Data Buffer B and Load DACA and DACB simultaneously:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
1
1
X
1
1
0
Don't Care
The DACA and DACB analog outputs simultaneously power-down to each respective specified mode upon
completion of the 2nd write sequence.
Example 4: Power-Down DACA and DACB to High-Impedance Sequentially:
• 1st — Write power-down command to Data Buffer A and Load DAC A: DAC A output = Hi-Z:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
0
1
X
0
1
1
Don't Care
• 2nd — Write power-down command to Data Buffer B and Load DAC B: DAC B output = Hi-Z:
Reserved
0
Reserved
0
LDB
LDA
DC
Buffer Select PD1 PD0 DB15
—
DB1
DB0
1
0
X
1
1
1
Don't Care
The DACA and DACB analog outputs sequentially power-down to high-impedance upon completion of the 1st
and 2nd write sequences, respectively.
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