AZV99 Datasheet, PDF (4/15 Pages) Arizona Microtek, Inc – PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable

AZV99
LVDS DC Characteristics for Q_HG/Q¯ _HG Outputs¹ (V_EE = GND, V_CC = +3.0V to +5.5V)
Symbol
Characteristic
-40°C
Min
Max
0°C
Min
Max
25°C
Min
Max
V_OH
Output HIGH Voltage
1600
1600
1600
V_OL
V_OC
ΔV_OC
Output LOW Voltage
Output Common Mode Voltage²
Change in Common Mode Voltage³
900
1125
-50
1375
50
900
1125
-50
1375
50
900
1125
-50
1375
50
V_OUT
Single-Ended Output Swing
250
450
250
450
250
450
V_{DIFF_OUT} Differential Output Swing
500
900
500
900
500
900
1. Specified with 100Ω resistor connecting Q_HG and Q¯ _HG together.
2. Common mode voltage is the center voltage between Q_HG and Q¯ _HG during a steady state.
3. Change in common mode voltage is the difference between common mode voltages at opposite binary states.
85°C
Unit
Min
Max
1600 mV
900
mV
1125
1375 mV
-50
50
mV
250
450
mV
500
900
mV
AC Characteristics (V_EE = GND, V_CC = +3.0V to +5.5V)
Symbol
Characteristic
-40°C
0°C
25°C
85°C
Unit
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
t_PLH / t_PHL
t_SKEW
V_PP (AC)
Propagation Delay
D to Q/Q¯ Outputs¹
D to Q_HG/Q¯ _HG Outputs²
Duty Cycle Skew Q/Q¯ ³
Differnetial Input Swing⁴
(SE)
(SE)
(SE)
80
400
550
5
20
1000 80
400
550
5
20
1000 80
400
550
5
20
1000 80
430 ps
630
5
20 ps
1000 mV
Output Rise/Fall Times
t_r / t_f
(20% - 80%)
Q/Q¯ ¹ 100
Q_HG/Q¯ _HG2 180
260 100
280 180
260 100
280 180
260 100
280 180
260 ps
280
1. Specified with CS-SEL connected to V_EE and Q/Q¯ with AC coupled 50Ω loads.
2. Specified with 100Ω resistor connecting Q_HG and Q¯ _HG together.
3. Duty cycle skew is the difference between a t_PLH and t_PHL propagation delay through a device.
4. The peak-to-peak differential input swing is the range for which AC parameters guaranteed. V_D and V_D¯ must remain within the range of ±750 mV
with respect to V_BB.
AC PP INPUT
D
D
V_PP (AC)
April 2007 * REV - 9
www.azmicrotek.com
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