HCPL-800J Datasheet, PDF (15/18 Pages) AVAGO TECHNOLOGIES LIMITED – Under-Voltage Detection

Applications Information
Tx-en
Tx-in
Rx-out
Status
C1
100 nF
R3
2 kÙ
R1
100 nF
5 kÙ
R2
10 kÙ
VCC1
100 nF
GND1
1 _Tx-en
2 _Tx-in
3 _Rx-PD-out
4 _Rx-Amp-in
5 _Status
6 _Rx-out
7 _VCC1
8 _GND1
HCPL-800J
GND2
Tx-out
VCC2
Tx-PD-out
Tx-LD-in
Cext
Rx-in
Rref
16
GND2
15
R4
2Ù
14
13
12
11
10 ^{1 µF}
9
Filter
GND2
Filter
Rref
24 kÙ
VCC2
100 nF
100 µF
GND2 GND2
1 µF
L2
D1
C2
L
X2
L1
330 µH
N
GND1
GND2
GND2
Figure 25. Schematic of HCPL - 800J application for FSK modulation scheme
Typical application for FSK modulation scheme
The HCPL-800J is designed to work with various trans-
ceivers and can be used with a variety of modulation
methods including ASK, FSK and BPSK. Figure 25 shows
a typical application in a powerline modem using
Frequency Shift Keying (FSK) modulation scheme.
Transmitter
The analogue Tx input pin is connected to the modulator
via an external coupling capacitor C1 and a series resistor
R3 (see Figure 25). Optimal performance is obtained with
an input signal of 250 µA_PP. E.g., for a modulator with an
output signal of 0.5 V_PP using a coupling capacitor of 100
nF, the optimal series resistor R3 would be 2 kΩ.
TX AGC
To ensure a stable and constant output voltage at Tx-PD-
out, the HCPL-800J includes an Automatic Gain Control
(AGC) circuit in the isolated transmit signal path.
This AGC circuit compensates for variations in the
input signal level presented at Tx-in and variations in
the optical channel over temperature and time. The
Tx-PD-out output signal is effectively stabilized for input
Tx-in signals of between 150 µA_PP and 250 µA_PP (see
Figure 8). The AGC circuit starts to function 10 µs after the
Tx-en signal is set to logic high. After a period of 180 µs
the Tx-PD-out signal typically reaches 66% of its steady
state level (see Figure 26). To ensure correct operation of
the internal circuitry, an external 1 µF capacitor needs to
be connected from pin 11 to GND2.
The optical signal coupling technology used in the
HCPL-800J transmit path achieves very good harmonic
distortion typically HD2 < -50 dB and HD3 < -62 dB, which
is usually significantly better than the distortion perfor-
mance of the modulated input signal. However to meet
the requirements of some international EMC regulations
it is often necessary to filter the modulated input signal.
The optimal position for such a filter is between pins 13
and 12 as shown in Figure 25. A possible band-pass filter
topology is shown in Figure 27, some typical values of
the components in this filter are listed in Table 1.
Tx-en 5 V/Div
5 0 µs/Div
Tx-PD-out 1 V/Div
ts, Tx
tAGC
Figure 26. Tx-PD-out AGC response time
15