HCPL-M600500 Datasheet, PDF (11/11 Pages) AVAGO TECHNOLOGIES LIMITED – Small Outline, 5 Lead, High CMR, High Speed, Logic Gate Optocouplers

6
V_CC = 5.0 V
5 ^{VO = 0.6 V}
4
3
R_L = 350 Ω
R_L = 1 kΩ
2
1
R_L = 4 kΩ
0
-60 -40 -20 0 20 40 60 80 100
T_A – TEMPERATURE – °C
V_CC1 ^{5 V}
6
5V
GND 1
470
I_{F 1}
*D1
V_F
3
1
SHIELD
390 Ω
5
0.1 μF
BYPASS
4
2
* DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED
FOR UNITS WITH OPEN COLLECTOR OUTPUT.
V_CC 2
GND 2
Figure 13. Input Threshold Current vs. Temperature.
Figure 14. Recommended TTL/LSTTL to TTL/LSTTL Interface Circuit.
I_F
50%
V_O
1.5 V
DATA
INPUTS
CLOCK
I_F
50%
V_O
1.5 V
t_PSK
DATA
OUTPUTS
CLOCK
t_PSK
t_PSK
Figure 15. Illustration of Propagation Delay Skew
– t_PSK.
Figure 16. Parallel Data Transmission Example.
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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes AV01-0562EN
AV02-0941EN - February 23, 2010