SAM9G25_14 Datasheet, PDF (923/1167 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded Microprocessor

40.7.14 ADC Extended Mode Register
Name:
Address:
Access:
ADC_EMR
0xF804C040
Read-write
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
TAG
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
CMPFILTER
–
–
CMPALL
–
7
6
5
4
3
2
1
0
CMPSEL
–
–
CMPMODE
This register can only be written if the WPEN bit is cleared in “ADC Write Protect Mode Register” on page 927.
• CMPMODE: Comparison Mode
Value
0
1
2
3
Name
LOW
HIGH
IN
OUT
Description
Generates an event when the converted data is lower than the low threshold of the window.
Generates an event when the converted data is higher than the high threshold of the window.
Generates an event when the converted data is in the comparison window.
Generates an event when the converted data is out of the comparison window.
• CMPSEL: Comparison Selected Channel
If CMPALL = 0: CMPSEL indicates which channel has to be compared.
If CMPALL = 1: No effect.
• CMPALL: Compare All Channels
0 = Only channel indicated in CMPSEL field is compared.
1 = All channels are compared.
• CMPFILTER: Compare Event Filtering
Number of consecutive compare events necessary to raise the flag = CMPFILTER+1
When programmed to 0, the flag rises as soon as an event occurs.
• TAG: TAG of the ADC_LDCR register
0 = Sets CHNB to zero in ADC_LDCR.
1 = Appends the channel number to the conversion result in ADC_LDCR register.
SAM9G25 [DATASHEET]
Atmel-11032E-ATARM-SAMG25-Datasheet_13-Oct-14
1923