SAM9G25_14 Datasheet, PDF (479/1167 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded Microprocessor

30.7.11 DDRSDRC Write Protect Mode Register
Name:
DDRSDRC_WPMR
Address: 0xFFFFE8E4
Access:
Read-write
Reset
See Table 30-16
31
30
29
28
27
26
25
24
WPKEY
23
22
21
20
19
18
17
16
WPKEY
15
14
13
12
11
10
9
8
WPKEY
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
WPEN
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x444452 (“DDR” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x444452 (“DDR” in ASCII).
Protects the registers:
• “DDRSDRC Mode Register” on page 464
• “DDRSDRC Refresh Timer Register” on page 465
• “DDRSDRC Configuration Register” on page 466
• “DDRSDRC Timing Parameter 0 Register” on page 469
• “DDRSDRC Timing Parameter 1 Register” on page 471
• “DDRSDRC Timing Parameter 2 Register” on page 472
• “DDRSDRC Memory Device Register” on page 476
• “DDRSDRC High Speed Register” on page 478
• WPKEY: Write Protect KEY
Should be written at value 0x444452 (“DDR” in ASCII). Writing any other value in this field aborts the write operation of the WPEN
bit. Always reads as 0.
SAM9G25 [DATASHEET]
Atmel-11032E-ATARM-SAMG25-Datasheet_13-Oct-14
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