AT91SAM7A1_05 Datasheet, PDF (9/402 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM7A1
5.2 Power Consumption
5.2.1
Working Modes
The AT91SAM7A1 microcontroller provides different working modes.
Table 5-1. Working Modes
Mode
Note
Low-power Mode (LPM)
The master clock oscillator, the PLL and the internal divider are switched off. The real time oscillator is
enabled. The low frequency clock is selected from the real time oscillator and used as a system clock
(i.e., 32.768 kHz used for GIC, WD, WT, ST and any peripheral needed for interrupt generation).
CORECLK = RTCK, LFCLK = RTCK
Slow Mode (SLM)
The PLL is switched off. The system clock is the master clock (CORECLK = MCK) or the master clock
divided by β (CORECLK = MCK/β, β in the range [2:256]).
Operational (OPE)
Master oscillator and PLL are enabled. The system clock is the clock from the PLL, CORECLK = α x
MCK (α in the range [x2:x20])
5.2.2
Low-power Mode
Low-power mode is defined as the state in which:
• Master clock oscillator and PLL are stopped
• Low frequency oscillator (32.768 kHz) is used as an internal system clock for core and all
peripherals (CORECLK = RTCK, LFCLK = RTCK)
The total power dissipation of the AT91SAM7A1 embedded system, when in low power mode,
is estimated to be 170 µW maximum, at an operating voltage of 3.3V, over the operating tem-
perature range. Additional conditions are: ARM core stopped, PDC stopped, all modules
disabled except ST0, ST1, WT, WD and PMC working at 32.768 kHz.
5.2.3 Slow Mode
Slow mode is defined as the state in which:
• Master clock oscillator is enabled, divided by β (β in the range [2:256]) and used as the
system clock (CORECLK = MCK or MCK/β)
• The low frequency clock can still be used as low frequency clock for peripherals (LFCLK =
RTCK or MCK/β)
The total power dissipation of the AT91SAM7A1 embedded system, when in halt mode, is
estimated to be 78 mW with CORECLK = MCK, at an operating voltage of 3.3V, over the
operating temperature range and with ARM core and modules working at CORECLK fre-
quency = 4 MHz. With CORECLK = MCK/64, total power dissipation is estimated at 4 mW, at
an operating voltage of 3.3V, over the operating temperature range and with ARM core and
modules working at CORECLK frequency = 62.5 kHz (i.e., 4 MHz/64).
5.2.4
Operational Mode
Operational mode is defined as the state in which:
• Master clock oscillator and PLL are enabled, system clock is taken from the PLL output
(CORECLK = α x MCK, where α is in the range [2:20])
• The Low frequency clock can still be used as low frequency clock for peripherals (LFCLK =
RTCK or MCK/β, β in the range [2:256])
The total power dissipation of the AT91SAM7A1 embedded system, when in operational
mode, is estimated to be 605 mW maximum, at an operating voltage of 3.3V, over the operat-
9
6048A–ATARM–03-Mar-05