AT91SAM7A1_05 Datasheet, PDF (247/402 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

22.6.20 SPI Interrupt Enable Register
Name:
SPI_IER
Access:
Write-only
Base Address:
0xFFFB4074
22.6.21 SPI Interrupt Disable Register
Name:
SPI_IDR
Access:
Write-only
Base Address:
0xFFFB4078
31
30
29
–
–
–
23
22
21
–
NPCS3
NPCS2
15
14
13
–
–
–
7
6
5
–
–
TEND
28
–
20
NPCS1
12
–
4
REND
• RDRF: Receive Data Register Full Interrupt Mask
0: Receive Data Register Full Interrupt is disabled.
1: Receive Data Register Full Interrupt is enabled.
• TDRE: Transmit Data Register Empty Interrupt Mask
0: Transmit Data Register Empty Interrupt is disabled.
1: Transmit Data Register Empty Interrupt is enabled.
• MODF: Mode Fault Error Interrupt Mask
0: Mode Fault Interrupt is disabled.
1: Mode Fault Interrupt is enabled.
Only used in Master Mode.
• SPIOVRE: Overrun Error Interrupt Mask
0: Overrun Error Interrupt is disabled.
1: Overrun Error Interrupt is enabled.
• REND: PDC Reception End Interrupt Mask
0: Reception End Interrupt is disabled.
1: Reception End Interrupt is enabled.
27
–
19
NPCS0
11
–
3
SPIOVRE
26
–
18
MOSI
10
–
2
MODF
AT91SAM7A1
25
–
17
MISO
9
–
1
TDRE
24
–
16
SPCK
8
–
0
RDRF
6048A–ATARM–03-Mar-05
247