AT91SAM7A1_05 Datasheet, PDF (317/402 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM7A1
26. General-purpose Timer (GPT)
26.1 Description
The AT91SAM7A1 has three independent general-purpose timer blocks. They are grouped in
the same block and can be cascaded. Each timer has a 16-bit Timer/counter channel, a Power
Management Controller and a Parallel I/O Controller. Each channel can be independently pro-
grammed using the two operating modes (capture mode or waveform mode) to perform a
range of functions including frequency measurement, event counting, interval measurement,
pulse generation, delay timing, pulse width modulation and interrupt generation.
Figure 26-1. General-purpose Timer - Three-channel Block Diagram
CORECLK/2
CORECLK/8
CORECLK/32
CORECLK/128
CORECLK/1024
GPT0TCLK0/MPIO
TIOA1/MPIO
TIOA2/MPIO
GPT0TCLK1/MPIO
GPT0TCLK2/MPIO
GPT0TCLK0/MPIO
GPT0TCLK1/MPIO
TIOA0/MPIO
TIOA2/MPIO
GPT0TCLK2/MPIO
XC0
XC1
XC2
GPTCx_BMR[1:0]
Timer/Counter
Channel 0 ^TIOA
TIOB
TIOA0
TIOB0
GPTC_SYNC _INT
XC0
XC1
XC2
Timer/Counter
Channel 1 ^TIOA
TIOB
TIOA1
TIOB1
GPTCx_BMR[3:2]
GPTC_SYNC _INT
Parallel I/O
Controller
T0TCLK0/MPIO
T0TCLK1/MPIO
T0TCLK2/MPIO
TIOA0/MPIO
TIOB0/MPIO
TIOA1/MPIO
TIOB1/MPIO
GPT0TCLK0/MPIO
GPT0TCLK1/MPIO
GPT0TCLK2/MPIO
TIOA0/MPIO
TIOA1/MPIO
XC0
XC1
XC2
Timer/Counter
Channel 2 ^TIOA
TIOB
TIOA2
TIOB2
GPTCx_BMR[5:4]
GPTC_SYNC _INT
TIOA2/MPIO
TIOB2/MPIO
General-purpose Timer Block
Generic
Interrupt
Controller
Each General Purpose Timer may operate in a different mode (capture mode or waveform
mode). Their counters are fully independent and each channel is associated with its own par-
allel I/O block and Power Management Controller.
• After a hardware reset, the timer pins are set as general purpose I/O (configured as input),
the interrupts are disabled in the interrupt controller and the Timer Controller Clock and the
PIO Controller Clock are disabled.
• Parallel I/O has priority over any Timer I/O configuration.
6048A–ATARM–03-Mar-05
317