AT91SAM7A1_05 Datasheet, PDF (341/402 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM7A1
26.11.2 GPT Control Register in Capture Mode
Name:
GPT_CR
Access:
Write-only
Base Address:
0x60
31
30
29
28
–
–
–
–
23
22
21
20
–
–
–
–
15
14
13
12
–
–
–
–
7
6
5
4
–
–
–
–
27
–
19
–
11
–
3
SWTRG
26
–
18
–
10
–
2
CLKDIS
25
–
17
–
9
–
1
CLKEN
24
–
16
–
8
–
0
SWRST
• SWRST: Software Reset
0: No effect.
1: Generates a software reset.
A software triggered hardware reset of the channel is performed. It resets all the registers, including PIO and PMC registers
(except GPTX_PMSR).
• CLKEN: Counter Clock Enable
0: No effect.
1: Enables counter clock if CLKDIS = 0.
• CLKDIS: Counter Clock Disable
0: No effect.
1: Disables counter clock.
• SWTRG: Software Trigger
0: No effect.
1: Generates a software trigger.
This bit generates a software trigger for resetting and starting the counter at the next valid counter clock edge when the
counter clock is enabled.
Note: x: channel number
6048A–ATARM–03-Mar-05
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