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AT91SAM7A1_05 Datasheet, PDF (104/402 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers
15.6 Peripheral Data Controller (PDC) Memory Map
Table 15-3. PDC Memory Map
Offset
Register
0xFFFF8000 -
0xFFFF807C
Reserved
0xFFFF8080
CH0 Peripheral Register Address
0xFFFF8084
CH0 Control Register
0xFFFF8088
CH0 Memory Pointer
0xFFFF808C
CH0 Transfer Counter
0xFFFF8090
CH1 Peripheral Register Address
0xFFFF8094
CH1 Control Register
0xFFFF8098
CH1 Memory Pointer
0xFFFF809C
CH1 Transfer Counter
0xFFFF80A0
CH2 Peripheral Register Address
0xFFFF80A4
CH2 Control Register
0xFFFF80A8
CH2 Memory Pointer
0xFFFF80AC
CH2 Transfer Counter
0xFFFF80B0
CH3 Peripheral Register Address
0xFFFF80B4
CH3 Control Register
0xFFFF80B8
CH3 Memory Pointer
0xFFFF80BC
CH3 Transfer Counter
0xFFFF80C0
CH4 Peripheral Register Address
0xFFFF80C4
CH4 Control Register
0xFFFF80C8
CH4 Memory Pointer
0xFFFF80CC
CH4 Transfer Counter
0xFFFF80D0
CH5 Peripheral Register Address
0xFFFF80D4
CH5 Control Register
0xFFFF80D8
CH5 Memory Pointer
0xFFFF80DC
CH5 Transfer Counter
0xFFFF80E0
CH6 Peripheral Register Address
0xFFFF80E4
CH6 Control Register
0xFFFF80E8
CH6 Memory Pointer
0xFFFF80EC
CH6 Transfer Counter
0xFFFF80F0
CH7 Peripheral Register Address
0xFFFF80F4
CH7 Control Register
0xFFFF80F8
CH7 Memory Pointer
0xFFFF80FC
CH7 Transfer Counter
0xFFFF8100
CH8 Peripheral Register Address
Name
---
PDC_PRA0
PDC_CR0
PDC_MPR0
PDC_TCR0
PDC_PRA1
PDC_CR1
PDC_MPR1
PDC_TCR1
PDC_PRA2
PDC_CR2
PDC_MPR2
PDC_TCR2
PDC_PRA3
PDC_CR3
PDC_MPR3
PDC_TCR3
PDC_PRA4
PDC_CR4
PDC_MPR4
PDC_TCR4
PDC_PRA5
PDC_CR5
PDC_MPR5
PDC_TCR5
PDC_PRA6
PDC_CR6
PDC_MPR6
PDC_TCR6
PDC_PRA7
PDC_CR7
PDC_MPR7
PDC_TCR7
PDC_PRA8
104 AT91SAM7A1
Access
---
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Reset State
---
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
0x00000000
0x00000000
0x00000000
0xFFE00000
6048A–ATARM–03-Mar-05