SAM7S128_14 Datasheet, PDF (764/775 Pages) ATMEL Corporation – ARM-based Flash MCU

Version
6175C
Comments
AT91SAM7S321 addresses redefined:Table 22-4, “User Area Addresses,” on page 171
Values given in PIO Line column: Table 22-5, “Pins Driven during Boot Program Execution,” on page 171
Section 40. ”Errata” added lines and note to the following:
Section 40.6.3.1 ”MCK: Limited Master Clock Frequency Ranges” AT91SAM7S256
Section 40.11.3.1 ”MCK: Limited Master Clock Frequency Ranges” AT91SAM7S128
Section 40.16.3.1 ”MCK: Limited Master Clock Frequency Ranges” AT91SAM7S64
Section 40.21.3.1 ”MCK: Limited Master Clock Frequency Ranges” AT91SAM7S32
and
Section 40.6.4.1 ”NVM Bits: Write/Erase Cycles Number” AT91SAM7S256
Section 40.11.4.1 ”NVM Bits: Write/Erase Cycles Number” AT91SAM7S128
Section 40.16.4.1 ”NVM Bits: Write/Erase Cycles Number” AT91SAM7S64
Section 40.21.4.1 ”NVM Bits: Write/Erase Cycles Number” AT91SAM7S32
note ⁽²⁾ added to Table 37-24, “Embedded Flash Wait States,” on page 582
”Voltage Regulator Mode Register” page 118, bit field name corrected ”PSTDBY: Power Standby Mode”
AT91SAM7S321 addresses redefined:Table 22-4, “User Area Addresses,” on page 171
Values given in PIO Line column: Table 22-5, “Pins Driven during Boot Program Execution,” on page 171
Change
Request
Ref
#1217
#1547 and
review
review
#1585
#1217
Version
6175B
Comments
Added to datasheet: Section 40. “Errata” on page 595
Section 40.6 “SAM7S256 Errata - Manufacturing Number 58818C” on page 614,Section 40.11
“SAM7S128 Errata - Manufacturing Number 58818C” on page 646, Section 40.16 “SAM7S64 Errata -
Manufacturing Number 58814G” on page 678 Section 40.21 “SAM7S32 Errata - Manufacturing Number
58814G” on page 716
Changes/updates to the following:
“ADC Characteristics” on page 574, Figure 37-5 and Figure 37-6 on page 576, Table 37-6, “DC Flash
Characteristics SAM7S512/256/128,” on page 560 and Table 37-13, “Phase Lock Loop Characteristics,”
on page 570
update to “Internal Memory Mapping” on page 98
update to SVMST0: Saved PDC Abort Source and SVMST1: Saved ARM7TDMI Abort Source register
field definitions in “MC Abort Status Register” on page 103.
Section 8. “Memories” on page 18 updated: 2 ms => 3 ms, 10 ms => 15 ms, 4 ms => 6 ms
Evolution in IP blocks:
EFC: FMCN: Flash Microsecond Cycle Number register field in ”MC Flash Mode Register” page 138
PMC: Section 26.7 ”Programming Sequence” page 215
DBGU: ”ARCH: Architecture Identifier” page 259 register field in “Debug Unit Chip ID Register”
SPI: Section 28. ”Serial Peripheral Interface (SPI)” page 1
UDP: Section 34.3.2 ”Power Management” page 445, Section 34.6 ”USB Device Port (UDP) User
Interface” page 462, ”UDP Transceiver Control Register” page 478
In Features and global: ”EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support”
EmbeddedICE to replace usage of “embedded in-ciruit emulator”
Change
Request
Ref
05-501
05-507
05-509
05-529
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
764