SAM7S128_14 Datasheet, PDF (476/775 Pages) ATMEL Corporation – ARM-based Flash MCU

33.6.10 TC Status Register
Register Name:
TC_SRx [x=0..2]
Access Type:
Read-only
31
30
29
–
–
–
23
22
21
–
–
–
15
14
13
–
–
–
7
ETRGS
6
LDRBS
5
LDRAS
28
–
20
–
12
–
4
CPCS
27
–
19
–
11
–
3
CPBS
26
–
18
MTIOB
10
–
2
CPAS
25
–
17
MTIOA
9
–
1
LOVRS
24
–
16
CLKSTA
8
–
0
COVFS
• COVFS: Counter Overflow Status
0 = No counter overflow has occurred since the last read of the Status Register.
1 = A counter overflow has occurred since the last read of the Status Register.
• LOVRS: Load Overrun Status
0 = Load overrun has not occurred since the last read of the Status Register or WAVE = 1.
1 = RA or RB have been loaded at least twice without any read of the corresponding register since the last read of the Sta-
tus Register, if WAVE = 0.
• CPAS: RA Compare Status
0 = RA Compare has not occurred since the last read of the Status Register or WAVE = 0.
1 = RA Compare has occurred since the last read of the Status Register, if WAVE = 1.
• CPBS: RB Compare Status
0 = RB Compare has not occurred since the last read of the Status Register or WAVE = 0.
1 = RB Compare has occurred since the last read of the Status Register, if WAVE = 1.
• CPCS: RC Compare Status
0 = RC Compare has not occurred since the last read of the Status Register.
1 = RC Compare has occurred since the last read of the Status Register.
• LDRAS: RA Loading Status
0 = RA Load has not occurred since the last read of the Status Register or WAVE = 1.
1 = RA Load has occurred since the last read of the Status Register, if WAVE = 0.
• LDRBS: RB Loading Status
0 = RB Load has not occurred since the last read of the Status Register or WAVE = 1.
1 = RB Load has occurred since the last read of the Status Register, if WAVE = 0.
• ETRGS: External Trigger Status
0 = External trigger has not occurred since the last read of the Status Register.
1 = External trigger has occurred since the last read of the Status Register.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
476