SAM7S128_14 Datasheet, PDF (330/775 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 30-16. TWI Write Operation with Multiple Data Bytes with or without Internal Address
BEGIN
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)
Set the Control register:
- Master enable
TWI_CR = MSEN + SVDIS
Set the Master Mode register:
- Device slave address
- Internal address size (if IADR used)
- Transfer direction bit
Write ==> bit MREAD = 0
Internal address size = 0?
Yes
Load Transmit register
TWI_THR = Data to send
No
Set the internal address
TWI_IADR = address
TWI_THR = data to send
Yes
Read Status register
No
TXRDY = 1?
Yes
Data to send?
Read Status register
Yes
No
TXCOMP = 1?
END
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
330