SAM9M10_14 Datasheet, PDF (694/1385 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

6. When Data transfer is completed, host processor shall terminate the boot stream by writing the
HSMCI_CMDR register with SPCMD field set to BOOTEND.
34.11.2 Boot Procedure, DMA Mode
1. Configure the HSMCI data bus width by programming SDCBUS Field in the HSMCI_SDCR register. The
BOOT_BUS_WIDTH field in the device Extended CSD register must be set accordingly.
2. Set the byte count to 512 bytes and the block count to the desired number of blocks by writing BLKLEN and
BCNT fields of the HSMCI_BLKR Register.
3. Enable DMA transfer in the HSMCI_DMA register.
4. Configure DMA controller, program the total amount of data to be transferred and enable the relevant
channel.
5. Issue the Boot Operation Request command by writing to the HSMCI_CMDR register with SPCND set to
BOOTREQ, TRDIR set to READ and TRCMD set to “start data transfer”.
6. DMA controller copies the boot partition to the memory.
7. When DMA transfer is completed, host processor shall terminate the boot stream by writing the
HSMCI_CMDR register with SPCMD field set to BOOTEND.
694
SAM9M10 [DATASHEET]
Atmel-6355G-ATARM-SAM9M10-Datasheet_02-Sept-14