SAM9M10_14 Datasheet, PDF (6/1385 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

Table 2-1. Signal Description List (Continued)
Signal Name
PD0 - PD31
Function
Parallel IO Controller D
Type
I/O
Active
Level
–
Reference
Voltage
(1)
PE0 - PE31
Parallel IO Controller E
I/O
–
(1)
DDR_D0 -
DDR_D15
DDR_A0 -
DDR_A13
DDR_CLK-
#DDR_CLK
DDR_CKE
DDR_CS
DDR_WE
DDR_RAS-
DDR_CAS
DDR_DQM[0..1]
DDR_DQS[0..1]
DDR_BA0 -
DDR_BA1
DDR_VREF
D0 -D31
A0 - A25
NWAIT
NCS0 - NCS5
NWR0 - NWR3
NRD
NWE
NBS0 - NBS3
CFCE1 - CFCE2
CFOE
CFWE
CFIOR
CFIOW
CFRNW
CFCS0 -CFCS1
Data Bus
DDR Memory Interface- DDR2/SDRAM/LPDDR Controller
I/O
–
VDDIOM0
Address Bus
Output
–
VDDIOM0
DDR differential clock input
Output
–
VDDIOM0
DDR Clock Enable
DDR Chip Select
DDR Write Enable
Output
Output
Output
High
Low
Low
VDDIOM0
VDDIOM0
VDDIOM0
Row and Column Signal
Output
Low
VDDIOM0
Write Data Mask
Data Strobe
Output
Output
–
VDDIOM0
–
VDDIOM0
Bank Select
Output
–
VDDIOM0
Reference Voltage
Input
–
External Bus Interface - EBI
Data Bus
I/O
–
Address Bus
Output
–
External Wait Signal
Input
Low
Static Memory Controller - SMC
Chip Select Lines
Output
Low
Write Signal
Output
Low
Read Signal
Output
Low
Write Enable
Output
Low
Byte Mask Signal
Output
Low
CompactFlash Support
CompactFlash Chip Enable
Output
Low
CompactFlash Output Enable
Output
Low
CompactFlash Write Enable
Output
Low
CompactFlash IO Read
Output
Low
CompactFlash IO Write
Output
Low
CompactFlash Read Not Write
Output
–
CompactFlash Chip Select Lines
Output
Low
VDDIOM0
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
Comments
Pulled-up input at reset
(100kΩ)⁽³⁾, Schmitt trigger
Pulled-up input at reset
(100kΩ)⁽³⁾, Schmitt trigger
Pulled-up input at reset
0 at reset
–
–
–
–
–
–
–
–
–
Pulled-up input at reset
0 at reset
–
–
–
–
–
–
–
–
–
–
–
–
–
6
SAM9M10 [DATASHEET]
Atmel-6355G-ATARM-SAM9M10-Datasheet_02-Sept-14