SAM9G10_14 Datasheet, PDF (674/750 Pages) ATMEL Corporation – Additional Embedded Memories

38.11.12 LCD Timing Configuration Register 2
Name:
LCDTIM2
Address: 0x0060080C
Access: Read-write
Reset:
0x0000000
31
30
29
28
27
26
25
24
HFP
23
22
21
20
19
18
17
16
HFP
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
HPW
7
6
5
4
3
2
1
0
HBP
• HBP: Horizontal Back Porch
Number of idle LCDDOTCK cycles at the beginning of the line. Idle period is (HBP+1) LCDDOTCK cycles.
• HPW: Horizontal synchronization pulse width
Width of the LCDHSYNC pulse, given in LCDDOTCK cycles. Width is (HPW+1) LCDDOTCK cycles.
• HFP: Horizontal Front Porch
Number of idle LCDDOTCK cycles at the end of the line. Idle period is (HFP+1) LCDDOTCK cycles.
676 SAM9G10
6462B–ATARM–6-Sep-11