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| SAM9G10_14 Datasheet, PDF (533/750 Pages) ATMEL Corporation – Additional Embedded Memories | |||
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SAM9G10
Figure 34-10. WAVSEL = 10 With Trigger
Counter Value
0xFFFF
Counter cleared by compare match with RC
RC
Counter cleared by trigger
RB
RA
Waveform Examples
TIOB
Time
TIOA
34.5.11.3
WAVSEL = 01
When WAVSEL = 01, the value of TC_CV is incremented from 0 to 0xFFFF. Once 0xFFFF is
reached, the value of TC_CV is decremented to 0, then re-incremented to 0xFFFF and so on.
See Figure 34-11.
A trigger such as an external event or a software trigger can modify TC_CV at any time. If a trig-
ger occurs while TC_CV is incrementing, TC_CV then decrements. If a trigger is received while
TC_CV is decrementing, TC_CV then increments. See Figure 34-12.
RC Compare cannot be programmed to generate a trigger in this configuration.
At the same time, RC Compare can stop the counter clock (CPCSTOP = 1) and/or disable the
counter clock (CPCDIS = 1).
6462BâATARMâ6-Sep-11
535
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