SAM9G10_14 Datasheet, PDF (343/750 Pages) ATMEL Corporation – Additional Embedded Memories

29.6.11 PIO Controller Clear Output Data Register
Name:
PIO_CODR
Addresses:
0xFFFFF434 (PIOA), 0xFFFFF634 (PIOB), 0xFFFFF834 (PIOC)
Access Type:
Write-only
31
30
29
28
27
26
P31
P30
P29
P28
P27
P26
23
22
21
20
19
18
P23
P22
P21
P20
P19
P18
15
14
13
12
11
10
P15
P14
P13
P12
P11
P10
7
6
5
4
3
2
P7
P6
P5
P4
P3
P2
• P0-P31: Set Output Data
0 = No effect.
1 = Clears the data to be driven on the I/O line.
29.6.12 PIO Controller Output Data Status Register
Name:
PIO_ODSR
Addresses:
0xFFFFF438 (PIOA), 0xFFFFF638 (PIOB), 0xFFFFF838 (PIOC)
Access Type:
Read-only or Read/Write
31
30
29
28
27
26
P31
P30
P29
P28
P27
P26
23
22
21
20
19
18
P23
P22
P21
P20
P19
P18
15
14
13
12
11
10
P15
P14
P13
P12
P11
P10
7
6
5
4
3
2
P7
P6
P5
P4
P3
P2
• P0-P31: Output Data Status
0 = The data to be driven on the I/O line is 0.
1 = The data to be driven on the I/O line is 1.
SAM9G10
25
24
P25
P24
17
16
P17
P16
9
8
P9
P8
1
0
P1
P0
25
24
P25
P24
17
16
P17
P16
9
8
P9
P8
1
0
P1
P0
6462B–ATARM–6-Sep-11
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